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UPD8259 の電気的特性と機能

UPD8259のメーカーはNECです、この部品の機能は「PROGRAMMABLE INTERRUPT CONTROLLER」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD8259
部品説明 PROGRAMMABLE INTERRUPT CONTROLLER
メーカ NEC
ロゴ NEC ロゴ 




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UPD8259 Datasheet, UPD8259 PDF,ピン配置, 機能
NEe Microcomputers, Inc.
~EC
f'PD8259
",PD8259·5
PROGRAMMABLE INTERRUPT CONTROLLER
DESCRIPTION
The NEC pPD8259-5 is a programmable interrupt controller directly compatible with
the 8080A/8085A/pPD780(Z80™). It can service eight levels of interrupts and con-
tains on-chip logic to expand interrupt capabilities up to sixty-four levels with the
addition of other pPD8259-5's. The user is offered a selection of priority algorithms to
tailor the priority processing to meet his systems requirements. These algorithms can
be dynamically modified during operation, expanding the versatility of the micro-
processor system.
F EATUR ES
NEC now Supplies pPD8259-5 to pPD8259 Requirements
• Eight Level Priority Controller
• Programmable Base Vector Address
• Expandable to 64 Levels
• Programmable Interrupt Modes (Algorithms)
• Individual Request Mask Capability
• Single +5V Supply ±10% (No Clocks)
• Full Compatibility with 8080A
• pPD8259-5 Compatible with 8085A Speeds
• Available in 28 Pin Plastic and Ceramic Packages
PIN CONFIGURATION
cs
WR
RD
D7
DS
D5
D4
D3
D2
D1
DO
CASO
CAS1
GNQ
VCC
AO
iNTA
IR7
IRS
IR5
IR4
IR3
IR2
IR1
IRO
INT
SP
CAS 2
PIN NAMES
D7 - DO
RD
WR
AO
CAS2- CASO
SP
INT
INTA
IRO-IR7
l:§"
Data Bus (Bi-Directional)
Read Input
Write input
Command Select Address
Cascade Lines
Slave Program Input
Interrupt Output
Interrupt Acknowledge Input
Interrupt Request Inputs
Chip Select
II
TM: Z80 is a registered trademark of Zilog, Inc.
625

1 Page





UPD8259 pdf, ピン配列
/-L PD8259-5
PARAMETER
Input Capac itance
I/O Capacitance
SYMBOL
CIN
CliO
LIMITS
MIN TYP MAX
10
20
UNIT
pF
pF
TEST
CONDITIONS
fc = 1 MHz
Unmeasured Pins
Returned to VSS
AC CHARACTER ISTICS
Ta = o°c to +70'C; VCC = +5V ± 10%; GND = OV
PARAMETER
LIMITS
~ 8259 I 8259·5
I ISYMBOL MIN MAX MIN MAX
READ
CS/AO Stable Before RD or INTA
CS/AO Stable After RD or INTA
RD Pulse Width
Data Valid From RD/INTA
Data Float After RD/iiiiTA
tAR
tRA
tRR
tRD
tDF
50
50
420
300
20 200
WRITE
0
0
250
150
20 100
AO Stable Before WR
AO Stable After WR
CS Stable Before WR
CS Stable After WR
WR Pulse Width
Data Valid to WR (T.E.)
Data Valid After WR
tAW
tWA
tcw
'WC
tww
tDW
two
50
20
50
20
400
300
40
0
0
250
150
0
OTHER
Width of Interrupt Request Pulse
t;w
100
100
INT 1 After IR t
'1NT
400
250
Cascade Line Stable After INTA t '1C
400
300
<DNote: For I'PD8259: C L = 100 pf; for I'PD8259-5: C L = 150 pf
@ Data for Comparison only
TEST
UNIT CONDITIONS
ns
ns
ns
ns <D
ns <D
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
627


3Pages


UPD8259 電子部品, 半導体
/-L PD8259-5
READ
~CHIP SELECT
Jr-
-J,.______ADDRESSBUS __
I ~TRA
~----~'-------
TIMING WAVEFORMS
WRITE
DATABUS.________~~_4--~~--~----
I/OWR
' __READ STATUS/POLL MODE
... ......./
OTHER
IR
____________IN
I
T
i;:~r=~INT
V~~~------------------~\~
INTA
~
DB \HIGH IMPEDANCE
CO-2
_
liC
Note: IR must stay "high" at least until the leading edge of 1st INTA.
INPUT WAVEFORMS FOR AC TESTS
630
INITIALIZATION SEQUENCE
STORE BYTE 1 STORE BYTE 2
STORE BYTE 3

6 Page



ページ 合計 : 16 ページ
 
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[ UPD8259 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


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UPD8251AF

PROGRAMMABLE COMMUNICATIONS INTERFACE

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UPD8253

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