DataSheet.jp

UPD8251 の電気的特性と機能

UPD8251のメーカーはNECです、この部品の機能は「PROGRAMMABLE COMMUNICATIONS INTERFACE」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD8251
部品説明 PROGRAMMABLE COMMUNICATIONS INTERFACE
メーカ NEC
ロゴ NEC ロゴ 




このページの下部にプレビューとUPD8251ダウンロード(pdfファイル)リンクがあります。

Total 18 pages

No Preview Available !

UPD8251 Datasheet, UPD8251 PDF,ピン配置, 機能
NEe Microcomputers, Inc.
NEe
p.PD8251
p.PD8251A
PROGRAMMABLE COMMUNICATION INTERFACES
DESCRIPTION
The}.lPD8251 and}.lPD8251A Universal Synchronous/Asynchronous Receiver/
Transmitters (USARTs) are designed for microcomputer systems data communications.
The USART is used as a peripheral and is programmed by the 8080A or other
processor to communicate in commonly used serial data transmission techniques includ·
ing IBM Bi-Sync. The USART receives serial data streams and converts them into
parallel data characters for the processor. While receiving serial data, the USART will
also accept data characters from the processor in parallel format, convert them to serial
format and transmit. The USART will signal the processor when it has completely
received or transmitted a character and requires service. Complete USART status
including data format errors and control signals such as TxE and SYNDET, is available
to the processor at any time.
FEATURES
Asynchronous or Synchronous Operation
Asynch ronous:
Five 8-Bit Characters
Clock Rate - 1, 16 or 64 x Baud Rate
Break Character Generation
Select 1, 1-1/2, or 2 Stop Bits
False Start Bit Detector
Automatic Break Detect and Handling (}.lPD8251 A)
Synchronous:
Five 8-Bit Characters
Internal or External Character Synchronization
Automatic Sync Insertion
Single or Double Sync Characters
• Baud Rate (1X Mode) - DC to 56K Baud (}.lPD8251)
- DC to 64K Baud (}.lPD8251A)
• Full Duplex, Double Buffered Transmitter and Receiver
• Parity, Overrun and Framing Flags
• Fully Compatible with 8080A/8085/}.lPD780 (Z80TM)
• All Inputs and Outputs are TTL Compatible
• Single +5 Volt Supply, ±10%
• Separate Device Receive and Transmit TTL Clocks
• 28 Pin Plastic DIP Package
• N-Channel MOS Technology
PIN CONFIGURATION 02
RxROY
0,
00
vCC
~
Di'R
RTs
DSR
RESET
CLK
T.O
TxE
CTS"
SYNDET ("PD82511
SYNDET/BD ("PD8251A)
TxRDY
0,.00
CIO
RO
WR
CS
CLK
RESeT
TxC
TxO
RxC
RxO
RxRDY
TKRDY
Q.!lR
OTR
SYNDET
SVNDET/BO
RTS
CTS
T••
Vee
GNO
PIN NAMES
Data Bus 18 bitt)
Control or Data is to be Written or Read
And Data Command
Write Data or Control Command
Chip Enable
Clock Pulse (TTL!
R. ."
Transmitter Ctock (TTL)
Transmitter o.t.
Rewlve, Clock (TTL)
Receiver Data
Receiver Ready (has character for 8080)
Transmitter Readv (readv for char. from 80an
O.t. Set Rudy
Data Terminal Ready
Sync Oetect
Sync Detect/Break Detect
Requillt to Send Oat.
CI••r 10 Send Data
Transmitter Empty
+5 V04t Supply
Ground
II
TM: Z80 is a registered trademark of Zilog.
Rev/4
583

1 Page





UPD8251 pdf, ピン配列
BLOCK DIAGRAM
ILPD825118251A
hO
TxROY
hE
he
RxRDY
SYNDET (.I.IP08251)
SYNDET/SD (j,OPD8251AI
ABSOLUTE MAXIMUM
RATINGS*
Operating Temperature.
Storage Temperature
Ali Output Voltages.
All Input Voltages
Supply Voltages ...
. . . - 0° C to +70° C
-65°C to +125°C
-0.5 to +7 Volts
-0.5 to +7 Volts
-0.5 to +7 Volts
COMMENT: Stress above those listed under "Absolute Maximum Ratings" may cause perr:'anent
damage to the device. This is a stress rating only and functional operation of the device at these or
any other conditions above those indica'ted in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
DC CHARACTERISTICS
*Ta = 25°C
Ta = o'e to 70'e; Vee = 5.0V ± 10%; GND = OV.
LIMITS
PARAMETER
PD825!
uPD8251A
SYMBOL MIN TYP MAX MIN MAX UNIT
TEST CONDITIONS
Input Low Voltage
VIL -0.5
O.B 0.5 O.B V
Input High Voltage
Output Low Voltage
VIH
VOL
2.0
Vee
2.0 Vee
V
0.45
"PDB251 : IOL = 1.7 mA
0.45 V
"POB251A: IOL = 2.2 mA
Output High Voltage
VOH
2.4
"POB251 : IOH = -10e"A
2.4 V
"POB251A: IOH =-400 "A
Data Bus Leakage
IOL
-50 -10
VOUT =0.45V
10 10 "A VOUT = Vce
Input Load Current
IlL
Power Supply Cur,rent ICC
10
45 BO
10 "A At 5.5V
"PDB251A: All Outputs ::
100 mA
Logic 1
CAPACITANCE
PARAMETER
Input Capacitance
110 Capacitance
SYMBOL
CIN
CliO
MIN
LIMITS
TV'
MAX
10
20
UNIT
pF
pF
TEST
CONDITIONS
te = 1 MHz
Unmeasured
pins returned
to GNO
585


3Pages


UPD8251 電子部品, 半導体
fLPD825118251 A
0)
______________________DTR,RTS------------------------------~--x~~~----------------­
WR----------------.~r_~tw-c-~~--------
~
DATA IN ID.B.I ---------------tj==jj~---------
tWA
c!15 _ _ _ _ _ _ _-J
~ --------------~
tWA
WRITE CONTROL OR OUTPUT PORT CYCLE
(PROCESSOR + USART)
CD
r_=__ --;"IDSR, CTS -__-_-_-__-~.X,~-_-__-_-~-~-----------------_-_--_-_-_-
RD _________ t_CR__ f - I R R = i - - - - - - -
DATAOUT _________________]_~tt=-'=R=D==j~I- --L---'O-F ---
10.B.1
--j tAR - -
Cfl5 _ _ _ _ _ _ _...Jfi
- 'RALr-- -
~ ------------,-\l.'A._R_-________-__-IR-A3f--r-
READ CONTROL OR INPUT PORT CYCLE
(PROCESSOR +- USART)
NOTES
CD TWC Includes the ,"pOnH tIming of a control byte
o TCR Includes the effect of CTS on ttNt TxENBL circuItry
TIMING WAVEFORM
(CaNT,)
m
ITxEMPTY
Tx EMPTY -------<~---------J_-------__l
Tx READY
(STATUS BIT)
Ix READY
(PIN)
ciB
WR
TxDATA -------~\LIOaxXD~noaxXD~tooaXDa1~----~~X(dl_~
DATA CHAR 1 DATA CHAR 2 DATA CHAR 3
DATA CHAR 4
EXAMPLE FORMAT eo 7 BIT CHARACTER WITH PARITY AND 2 STOP BITS
TRANSMITTER CONTROL AND FLAG TIMING
(ASYNC MODE)
588

6 Page



ページ 合計 : 18 ページ
 
PDF
ダウンロード
[ UPD8251 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
UPD8251

PROGRAMMABLE COMMUNICATIONS INTERFACE

NEC
NEC
UPD8251A

PROGRAMMABLE COMMUNICATIONS INTERFACE

NEC
NEC
UPD8251AF

PROGRAMMABLE COMMUNICATIONS INTERFACE

NEC
NEC
UPD8253

PROGRAMMABLE INTERVAL TIMER

NEC
NEC


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap