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UM8253 の電気的特性と機能

UM8253のメーカーはUMCです、この部品の機能は「Programmable Interval Timer」です。


製品の詳細 ( Datasheet PDF )

部品番号 UM8253
部品説明 Programmable Interval Timer
メーカ UMC
ロゴ UMC ロゴ 




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UM8253 Datasheet, UM8253 PDF,ピン配置, 機能
(l)UMC
UM8253/ UM8253-5
Features
• MCS-85™ compatible UM8253-5
• 3 independent 16-bit counters
• DC to 2.6 MHz
• Programmable counter modes
• Count binary or BCD
• Single +5V supply
General Description
The UM8253 is a programmable counter timer device
designed for use as an microcomputer peripheral. It uses
NMOS technology with a single +5V supply and is packaged
in a 24-pin plastic DIP.
It is organized as 3 independent 16-bit counters, each with
a count rate of up to 2.6 MHz. All modes of operation
are software programmable.
*MCS-85™ is the trademark of Intel microsystem.
Pin Configuration
Block Diagram
07
06
Os
04
03
O2
0,
00
ClK 0
OUT 0
GATE 0
GNO
VCC
WR
RO
CS
Al
Ao
ClK 2
OUT.2
GATE 2
ClK 1
GATE 1
OUT 1
.07-00
Ao
AI
Cs
READ/
WRITE
LOGIC
7-143

1 Page





UM8253 pdf, ピン配列
A.C. Characteristics (Continued)
WRITE CYCLE
Symbol
tAW
tWA
tww
tDW
tWD
tRV
Parameter
Address Stable Before WRITE
Address Hold Time for WRITE
WR ITE Pulse Width
Data Set Up Time for WR ITE
Data Hold Time for WR ITE
Recovery time Between WRITE
and Any Other Control Signal
Clock and Gate Timing
Symbol
tCLK
tPWH
tpWL
tGW
tGL
tGS
tGH
tOD
tODG
Parameter
Clock Period
High Pulse Width
Low Pu Ise Width
Gate Width High
Gate Width Low
Gate Set Up Time to CLKt
Gate Hold Time After CLKt
Output Delay From CLK-l-[4)
Output Delay From Gate-l- [4)
Notes:
1. IOL = 2.2 mA.
2. IOH = -400 JlA.
3. AC timings measured at VOH 2.2, VOL = 0.8.
4. CL = 150pF.
A.C. Testing Input, Output Waveform
UM8253/UM8253-5
UM8253
Min. Max.
50
30
400
300
40
1
UM8253-6
.Min.
Max.
30
30
300
250
30
1
Units
ns
ns
ns
ns
ns
/-lS
UM8253
Min.
Max.
380 dc
230
150
150
100
100
50
400
300
UM8253·5
Min.
Max.
380 dc
230
150
150
100
100
50
400
300
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
A.C. Testing Load Circuit
>2.4
2.2V
2.2V
TEST POINTS<
0.8
0.45
0.8
A.C. TESTING: INPUTS ARE DRIVENIAT 2.4V FOR A LOGIC "1"
AND 0.45V FOR A LOGIC "0" TIMING MEASUREMENTS .ARE
MADE AT 2.2V FOR A LGOIC "1" AND 0.8t1! FOR A LOGIC 0
DEVICE
UNDER
TEST
nCL=150PF
1
=-
CL INCLUDES JIG CAPACITANCE
7-145


3Pages


UM8253 電子部品, 半導体
CS (Chip Select)
A "low" on this input enables the UM8253. No reading
or writing will occur unless the device is selected. The
CS input has no effect upon the actual operation of the
counters.
Control Word Register
"The Control Word Register is selected when Ao, At are
11. It then accepts information from the data bus buffer
and stores it in a register. The information stored in this
register controls the operational MOOE of each counter,
selection of binary or BCD counting and the loading of
each count register.
The Control Word Register can only be written into; no
read operation of its contents is available.
Counter #0, Counter #1, Counter #2
These three functional blocks are identical in operation
so only a single Counter will be described. Each Counter
consists of a single, 16-bit, pre-settable, DOWN counter.
The counter can operate in either binary or BCD and its
input, gate and output are configured by the selection of
MODES stored in the Control Word Register.
The counters are fully independent and each can have
separate Mode configuration and counting operation,
binary or BCD. Also, there are special features in the
control word that handle the loading of the count value
so that software overhead can be minimized for these
functions.
The reading of the contents of each counter is available to
the programmer with simple READ operations for event
counting applications and special commands and logic are
included in the UM8253 so that the contents of each
counter can be read "on the fly" without having to inhibit
the clock input.
UM8253 / UM8253-5
Operational Description
General
The complete functionaf definit on of the UM8253 is
programmed by the systems software. A set of control
words must be sent out by the CPU to initialize each
counter of the UM8253 with the desired MODE and
Figure 2. Block Diagram Showing Control Word
Register and Counter Functions
UM8253 System Interface
The UM8253 is a component of the UMC Microcomputer
Systems and interfaces in the same manner as all other
peripherals of the family. It is treated by the systems
software as an array of peripheral I/O ports; three are
counters and the fourth is a control register for MODE
programming.
·Basically, the select inputs Ao ,Ai connect to the Ao. Ai
address bus signals of the CPU. The CS can be derived
directly from "the address bus using a linear select method.
Or it can be connected to the output of a decoder. such as
an 8205 for larger systems.
COUNTER
o
UM8253
COUNTER
1
Figure 3. UM8253 System Interface
7-148

6 Page



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共有リンク

Link :


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