DataSheet.jp

UM6521 の電気的特性と機能

UM6521のメーカーはUMCです、この部品の機能は「Peripheral Interface Adapter」です。


製品の詳細 ( Datasheet PDF )

部品番号 UM6521
部品説明 Peripheral Interface Adapter
メーカ UMC
ロゴ UMC ロゴ 




このページの下部にプレビューとUM6521ダウンロード(pdfファイル)リンクがあります。
Total 11 pages

No Preview Available !

UM6521 Datasheet, UM6521 PDF,ピン配置, 機能
<DUMC
;========= UM6521 / UM6521A
Peripheral Interface Adapter(PIA)
Features
• Extended performance version of UM6520
• Single +5V power supply
• Two 8-bit bi-directional I/O ports with individual data
direction control
• CMOS-compatible peripheral port A lines
• Automatic "handshake" control of data transfers
• Programmable interrupt capability
• Automatic initialization on power up
• 1 and 2 MHz versions
• Direct replacement for Motorola MC6821
General Descr~ption
The UM6521/A Peripheral Interface Adapter (PIA) is
designed to provide a broad range of peripheral control to
microcomputer systems. It is functionally compatible
with the UM6520, but with more drive capability and
improved performance. Control of peripheral devices
is accomplished through two 8-bit bi-directional I/O ports.
Each 1/0 line may be programmed to be either an input
or an output. In addition, four peripheral control lines
are provided to perform "handshaking" during data
transfers.
Pin Configuration
Block Diagram
vss
PAD
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PBO
PB1
PB2
PB3
PB4
PB5
PB6
PB7
CB1
CB2
VCC
CA1
CA2
IROA
IROB
RSD
RS1
RES
DO
01
02
03
04
05
06
07
1/>2
CS1
CS2
CSD
R/W
MICRO-
PROCESSORS
UM650X
8-BIT ¢=>
DATA'BUS
.
UM66211
6521A
CONTROL¢=>
CONTROL
8-BIT
DATA PORT
8-BIT
DATA PORT
PERIPHERAL
DEVICES-
PRINTERS,
DISPLAYS, ETC.
CONTROL
7-52

1 Page





UM6521 pdf, ピン配列
CS,AS,A/W ~~~I~=t:::::!=)
A/W
DO-07 -----T~~--.;.-1:
Figure 1. Read Timing Characteristic
</>2
CS,RS,RlW ~~~~~=l===::lt~~
UM6521/UM6521A
---'l.2 'cB2:1 \
~~~H~TO-LOW) ~tRS1-L:""------­
C(LBO2W-TO-HIGH)
}f~--------
_ _ _ _ _....J
Figure 6. CB2 Timing
CB1~
~~~tR-s-2-1--------
CB2 -----------'
Figure 7. CB l /CB2 Handshake Timing
Figure 2. Write Timing Characteristics
~2 ~ \\..--
PAO-PA7 +----x:~..;..; - - - - - - - - -
PBO-PB7 ---=::jI;".PO--s..u. -+_---------
Figure 3. Peripheral Data Setup Time
02 --'
\.
I
IT-t~6H-TO-LOW) _______+-~_t-C-A-2~\o---_
CA2
(LOW-TO-HIGH)
I-'RS1:1"'---
Figure 4. CA2 Timing
CAl~ 'RS2-L_______
TrCA2 _ _ _ _ _ _ _ _ _ _- J
Figure 5. CAl /CA2 Timing
Figure 8. PA Port Delay Time
PBO_P::~~~
CB2
toc
Figure 9. PB Port Delay Time
/
Figure 10. Interrupt Timing
---t.2 'IR -L \\..-----
IRQA, IRQB
_F
Figure 11. Interrupt Clear Timing
7-54


3Pages


UM6521 電子部品, 半導体
fl)UMC
UM6521/UM6521A
CRA
CRB
7
IROAl
7
IROBl
6
I ROA2
6
IROB2
543
CA2 Control
II
I
54 3
CB2 Control
II
I
2
DDRA
Access
2
DDRB
Access
10
CAl Control
II I
10
CBl Control
II
I
Figure 13. Control Registers
Data Input Register
When the microprocessor writes data into the Um6521,
the data which appears on the data bus during the Phase
Two clock pulse is latched into the Data Input Register.
It is then transferred into one of six internal registers of the
UM6521 after the trailing edge of Phase Two. This assures
that the data on the peripheral output lines will make
smooth transitions from high to low or from low to high
and the voltage will remain stable except when it is going
to the opposite polarity.
Control Registers (CRA and CRB)
Figure 4 illustrates the bit designation and functions in
the Control Registers. The Control Registers allow the
microprocessor to control the operation of the Interrupt
Control inputs (CAl, CA2, CB1, CB2), and Peripheral
Control outputs (CA2, CB2). Bit 2 in each register controls
the addressing of the Data Direction Registers (DDRA,
DDRB) and the Output Registers (ORA, ORB). In
addition, two bits (bit 6 and 7) are provided in each control
register to indicate the status of the interrupt input lines
(CA1, CA2, CB 1, CB2) .. These interrupt status bits (I ROA1,
(I ROB1) are normally interrogated by the microprocessor
during the interrupt service routine to determine the source
of an active interrupt. These are the interrupt lines which
drive the interrupt input (IRO, NMI) of the micro~
processor.
Data Direction Registers (DDRA, DDRB)
The Data Direction Registers allow the processor to
program each line in the a-bit Peripheral I/O port to be
either an input or an output. Each bit in DDRA controls
the corresponding line in the Peripheral A port and each
bit in DDRB controls the corresponding line in the
Peripheral B port. Placing a "0" in a bit position in the
Data Direction Register causes the corresponding Peripheral
I/O line to act as an input; a "1" causes it to act as an
output.
Peripheral Output Registers (ORA, ORB)
The Peripheral Output Registers store the output data
which appears on the Peripheral I/O port. Writing a "0"
into a bit in ORA causes the corresponding line on the
Peripheral A port to go low ( O.4V) if that line is pro-
grammed to act as an output.. A "1" causes the cor-
responding output to go high. The lines of the Peripheral
B port are controlled byORB in t~e same manner.
Interrupt Status Control
The four interrupt/peripheral control lines (CAl, CA2,
CB1, CB2) are controlled by the Interrupt Status Control
logic (A, B). This logic interprets the contents of the
corresponding Control Register, detects active transitions
on the interrupt inputs and performs those operations
necessary to assure proper operation of these four
peripheral interface lines.
Peripheral Interface Buffers (A, B) and Data Bus Buffers
(DBB)
These Buffers provide the necessary current and voltage
drive on the peripheral I/O ports and data bus to assure
.proper system operation and to meet the device speci-
fications.
Functional Description
Bit 2 (DDR) in each Control Register (CRA and CRB)
controls the accessing to the Data Direction Register or
the Peripheral interface. If bit 2 is a "1", a Peripheral
Output register (ORA, ORB) is selepted, and.if bit 2 is
a "0", a Data Direction Register (DDRA, DDRB) is
selected. The Data Direction Register Access Control
bit, together with· the Register Select lines (RSO, SR1)
selects the various internal registers as shown in Figure
14.
7-57

6 Page



ページ 合計 : 11 ページ
 
PDF
ダウンロード
[ UM6521 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
UM6520

Peripheral Interface Adapter

UMC
UMC
UM6520A

Peripheral Interface Adapter

UMC
UMC
UM6521

Peripheral Interface Adapter

UMC
UMC
UM6521A

Peripheral Interface Adapter

UMC
UMC


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap