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UM2681-1 の電気的特性と機能

UM2681-1のメーカーはUMCです、この部品の機能は「Dual Asynchronous Receiver/Transmitter」です。


製品の詳細 ( Datasheet PDF )

部品番号 UM2681-1
部品説明 Dual Asynchronous Receiver/Transmitter
メーカ UMC
ロゴ UMC ロゴ 




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UM2681-1 Datasheet, UM2681-1 PDF,ピン配置, 機能
(l)UMC
,===========Dual UM2681 SERIES
Wfi1 TArsaynnscmhirtotenro(uDsURAeRcTe)iver/
Features
• Dual full-duplex asynchronous receiver/transmitter
• Ouadruple buffered receiver data registers
• Programmable data format
5 to 8 data bits plus parity
Odd, even, no parity or force parity
1, 1.5 or 2 stop bits programmable in 1/16 bit
increments'
• Programmable baud rate for each receiver and
transmiter' selectable from:
18 fixed rates: 50 to 38.4K baud
One user defined rate derived from programmable
timer/counter
External 1x or 16x clock
• Parity, framing, and overrun error detection
• False start bit detection
• Line break detection and generation
• Programmable channel mode
Normal (full duplex)
Automatic echo
Localloopback
Remote loopback
• Multi-function programmable 16-bit counter/timer
• Multi-function 7-bit input port
- Can serve as clock or control inputs
- Change of state detection on four inputs
• Multi-function 8-bit output port
Individual bit set/reset capability
- Outputs can be programmed to be status/interrupt
signals
• Versatile interrupt system
Single interrupt output with eight maskable inter-
rupting conditions
Output port can be configured to provide a total of
up to six separate wire-OR'able interrupt outputs
• Maximum data transfer: 1X-l MB/sec, 16X-125KB/sec
• Automatic wake-up mode for multidrop applications
• Start-end break interrupt/status
• Detects break which originates in the middle of a
character
• On-chip crystal oscillator
• TTL compatible
• Single +5V power supply
General Description
The UM2681 Dual Universal Asynchronous Receiver/
Transmitter (DUART) is a single chip NMOS-LSI com-
munications device that provides two independent full-
duplex asynchronous receiver/transmitter channels in a
single package. It interfaces directly with microprocessors
and may be used in a polled or interrupt driven system.
The operating mode and data format of each channel can
be programmed independently. Additionally, each receiver
and transmitter can select its operating speed as one of
eighteen fixed baud rates, a 16X clock derived from a
programmable counter/timer, or an external 1X or 16X
Pin Configuration
clock. The baud rate generator and counter/timer can
operate directly from a crystal or from external clock
inputs. The ability to independently program the operating
speed 'of the receiver and transmitter make the DUART
particularly attractive for dual-speed channel applications
such as clustered terminal systems.
Each receiver is quadruply buffered to minimize the
potential of receiver overrun or to reduce interrupt over-
head in interrupt driven systems. In addition, a flow
control capability is provided to disable a remote DUART
transmitter when the buffer of the receiving device is full.
OP2
OP4
OP6
DO
02
04
06
INTRN
AO
Al
A2
A3
WRN
RON
RXOB
TXOB
OPl
01
03
05
07
GNO
VCC
IP2
CEN
RESET
X2
Xl/CLK
RXOA
TXOA
OPO
DO
02
04
D6
INTRN
Al
A2
A3
WRN
RON
RXOB
TXOB
01
03
05
07
GNO
7-18
AO
Vcc
CEN
RESET
Kl/CLK
RXOA
TXOA
DO
02
04
06
INTRN

1 Page





UM2681-1 pdf, ピン配列
D.C. Electrical Characteristics
(TA = o°C to +70°C. Vee = 5.0V ±.5%)
UM2681 SERIES
Parameter
Test Conditions
Limits
Units
Min. Typ.
Max.
VIL
VIH
VIH
VOL
VOH
IlL
ILL
loe
Icc
Input low voltage
Input high voltage (except Xl/ClK)
Input high voltage (Xl/ClK)
Output low voltage
Output high voltage (except o.c.• outputs)
Input'leakage current
Data bus 3-state leakage current
Open collector output leakage current
Power supply current
IOL=2.4mA
IOH = -400J.l.A
VIN= 0 to Vee
Vo = 0 to Vee
Vo = 0 to Vec
2.0
4.0
2.4
-10
-10
-10
0.8 V
V
V
0.4 V
V
10 J.l.A
10 J.l.A
10 J.l.A
150 mA
A.C. Electrical Characteristics
(TA = O°C to + 70°C. V cc = 5.0V ± 5%)
Parameter
Reset Ti~ing (Figure 1)
tRES RESET pulse width
Bus Timing (Figure 2)
tAS
tAH
tcs
tCH
tRW
AO-A3 setup time to RON. WRN low
AO-A3 hold time from RON. WRN high
CEN setup time to RON. WRN low
CEN hold time from RON. WRN high
WRN. RON pulse width
too
tOF
tos
tOH
tRWO
Data valid after RON low
Data bus floating after RDN high
Data setup time before WR N high
Data hold time after WRN high
High time between READs and/or WR ITEs
Tentative Limits
Min. Typ. Max.
1.0
10
0
0
0
225
175
100
100
20
200
Units
J.l.s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7-20


3Pages


UM2681-1 電子部品, 半導体
SUMC
Xl/CLK
CTCLK
RxC
TxC
TxC
(INPUT)
TxD
TxC
(1 X OUTPUT)
UM2681 SERIES
+5V
Cl: 10-15pF+{STRAY(5pF)
C2: 0-5pF+{STRAY (5pF)
lK
.-'-----1 ~.----.- CLOCK TO OTHER CHIPS
74LS04
.-----*----tX1
UM2681
'---_------tX2
3.6864MHz
CRYSTAL SERIES RESISTANCE SHOULD
BELESS THAN 180 OHMS.
Figure 5. Clock Timing
1 BIT TIME
(lOR 16 CLOCKS)
________________x~___
I
Figure 6. Transmit
\~--
Figure 7. Receive
TxD
TRANSMITTER
ENABLED
TxRDY
(SR2)
WRN
CTS 1
(IPO)
rRTSN2~
(OPO)
'
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
'~('
-
-
-
-
-
-
OPR(O)=l
OPR{O)=l
Notes: TIMING SHOWN FOR MR2(4) = 1
TIMING SHOWN FOR MR2(5) = 1
Figure 8. Transmitter Timing
7-23

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
UM2681-1

Dual Asynchronous Receiver/Transmitter

UMC
UMC
UM2681-2

Dual Asynchronous Receiver/Transmitter

UMC
UMC
UM2681-3

Dual Asynchronous Receiver/Transmitter

UMC
UMC


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