PDF UM9007 Data sheet ( Hoja de datos )

Número de pieza	UM9007
Descripción	CRT Controller
Fabricantes	UMC
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No Preview Available ! (l)UMC UM9007 CRT Controller Features • Fully programmable display format • Programmable monitor sync. format • Direct outputs to CRT monitor • Binary, row-table driven or sequential video addressing modes • Programmable status row position and address reg- isters • Bidirectional partial or full page smooth scroll • Attribute assemble mode • Double height, doubie width data row mode • Programmable DMA burst mode • Configurable with a variety of memory contention General Description The CRTC UM9007 is a next generation video processor/ controller-an MOS LSI integrated circuit which supports either sequential or row-table driven memory addressing modes. As indicated by the features above, the UM9007 provides the user with a wide range of programmable features permitting low cost implementation of high performance CRT systems. Its 14 address lines can directly address up to 16K of video memory. This is equivalent to eight pages of an 80 character by 24 Iine CRT display. Smooth or jump scroll operations may be performed any- where within the addressable memory. In addition, status rows can be defined anywhere on the screen. In the sequential video addressing mode, a Table Start Register points to the address of the first character of the first data row on the screen. It can be easily changed to produce a scrolling effect on the screen. By using this register in conjunction with two auxiliary address registers and two sequential break registers, a screen roll can be produced· with a stable status row held at either the first or last data row position. In the row-table driven video addressing mode, each row in the video display is deSignated by its own address. This provides the user with greater flexibility than sequential addressing since the rows of characters are linked by pointers instead of residing in sequential memory locations. Operations such as data row insertion, deletion, and repl ica- tion are easily accomplished by manipulating pointers instead of entire lines. The row table itself can be stored in memory in a linked list or in a contiguous format. The UM9007 works with a variety of memory contention schemes including operation with a Single Row Buffer, a Double Row Buffer such as the UM8312, or no buffer arrangements • Light pen register • Maskable processor interrupt line • Three-state video memory address bus • Partial or full page blank capability • Two interlace modes: enhanced video and alternate scan line • Programmable for horizontal split screen applications • Graphics compatible • VT-100 compatible • RS-170 Interlaced composite sync. available at all, in which case character addresses are output during each d isp layable scan line. User accessable internal registers provide such features as light pen, interrupt enabling, cursor addressing, and CRTC status. Ten of these registers are used for screen formatting with the ability to define over 200 characters per data row and up to 256 data rows per frame. These 10 registers contain the "vital screen parameters". VA2 VA10 VA3 VAll VA12 VA4 VA13 VA5 VA6 VA7 ALT \is HS CCLK DRB VD7 VD6 VD5 VD4 VD3 GND VAg VAl VA8 VAO CBLANK CURS ACK/TSC CSYNC/LPSTB SLD/SLO SLG/SLl WBEN/SL2/CSYNC DMAR/SL3!VBLANK INT RST CS VDO VDl VD2 VCC 1 page

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Número de pieza	Descripción	Fabricantes
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