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UM2366 の電気的特性と機能

UM2366のメーカーはUMCです、この部品の機能は「8K x 8 NMOS ROM」です。


製品の詳細 ( Datasheet PDF )

部品番号 UM2366
部品説明 8K x 8 NMOS ROM
メーカ UMC
ロゴ UMC ロゴ 




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UM2366 Datasheet, UM2366 PDF,ピン配置, 機能
(DUMC
=============UM2366/UM2366A
BK x B NMOS ROM
Features
• 2765 EPROM pin compatible
• 8192 x 8 bit organization
• Single + 5 volt supply
• Access time - 200/300/450 ns (max)
• Totally static operation
• Completely TT L compatible
• 28 Pin JEDEC approved pinout
• UM2366A automatic power down (CE)
output enable function (OE)
two programmable chip selects (CS)
• UM2366
non power down version
- four programmable chip sel~cts (CS)
• Three state outputs for wire-or expansion
• EPROMs accepted as program data input
Description
The UM2366 and UM2366A high performance Read Only
Memories are organized 8192 words by 8 bits with access
times from 200 ns to 450 ns. The ROMs are designed to be .
compatible with all microprocessor and similar applications
where high performance, large bit storage and simple inter-
facing are important design considerations. Both ROMs
conform to the JEDEC approved pinout for 28 pin 64K
ROMs.
The UM2366 offers the simplest operation (no power
down.) Its four programmable chip selects allow up to
sixteen 64K ROMs to be OR-tied without external decod-
ing.
The UM2366A offers an automatic power down feature.
Pin Configuration
Power down is controlled by the Chip Enable (CE) input.
When CE goes high, the device will automatically power
down and remain in a low power standby mode as long as
CE remains high. This unique feature provides system level
power savings as much as 90%. An additional feature of the
UM2366A is the Output Enable (OE) function. This
eliminates bus contention in multiple bus microprocessor
systems. The two programmable Chip Selects (CS) allow
up to four 64K ROMs to be OR-tied without external
decoding.
Both the UM2366 and UM2~66A are pin compatible with
the 2764 EPROM thus eliminating the need to redesign
printed circuit boards for volume mask programmed ROMs
after prototyping with EPROMs.
Block Diagram
Ne
A12
A7
A6
As
A4
A3
A2
Al
Ao
01
02
03
GND
vee
eSl*
eS2*
As
A9
Au
CS3*
AlO
eS4*
Os
07
06
°s
04
Ne
A12
A7
11.6
As
A4
A3
A2
Al
01
°2
03
GND
Vee
eSl*
eS2*
As
A9
All
OE
AlO
eE
Os
°7
06
°s
°4
65,536 BIT
ROM ARRAY
1256 x 256)
~~~:~S~~~~.TS cs ARE PROGRAMMABLE LOW ACTIVE, HJG~ ACTIVE OR

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UM2366 pdf, ピン配列
Timing Diagrams
Propagation Delay from Address (CE = OE = LOW, CSICS = Active)
UM2366/ UM2366A
VALID DATA
Propagation Delay from Chip Enable, Chip Select (Address Valid)
(4)
CS/CS
(6)
DATA
OUT--------~~~~~~------------------t_~~~~
~~~~--~--------------JI
J I_VCCCURRENT~ _____~__________
IS8
A.C. Testing Input, Output Waveform
2.4V
0.4V
> <2.0V
2.0V
TEST POINTS
O.BV
O.BV
INPUT
OUTPUT
AC TESTING: INPUTS ARE DRIVEN AT 2.4V FOR A LOGIC
"1" AND O.4V FOR A LOGIC "0". TIMING MEASUREMENTS
ARE MADE AT 2.0V FOR A LOGIC "1" AND O.BV FOR A
LOGIC "0". INPUT PU LSE RISE AND FALL TIMES ARE 5 ns.
A.C. Testing Load Circuit
~~::onDOUT
• mn
. ''''''' "NCCUD'NG SCDP' AND","'
Figure 1.
Programming Instructions
All UMC Read Only Memories (ROM) utilize compLl'ter
aided techniques to man~facture and test custom bit
patterns. The customer's bit pattern and address inform-
ation can be supplied to UMC in a number of different
ways. UMC can process customerinputs in EPROM, ROM,
PROM, paper tape, and computer punched cards. Contact
your UMC sales representative for complete details on each
of the various data input formats.
Programming instructions are listed at the end of the
Memory Section.
Ordering Information
Part . Access Operating Standby Package
Number
Time Current Current Type
UM2366
UM2366-1
UM2366-2
UM2366A
UM2366A-l
UM2366A-2
450 ns
300 ns
200 ns
450 ns
300 ns
200 ns
100 mA
100mA
100 mA
100 mA
mOmA
100mA
N.A.
N.A.
N.A.
12mA
12mA
12mA
Plastic
Plastic
Plastic
Plastic
Plastic
Plastic
1-14


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共有リンク

Link :


部品番号部品説明メーカ
UM2364

8K x 8 NMOS ROM

UMC
UMC
UM2364A

8K x 8 NMOS ROM

UMC
UMC
UM2366

8K x 8 NMOS ROM

UMC
UMC
UM2366A

8K x 8 NMOS ROM

UMC
UMC


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