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Datasheet HI-8597 PDF ( 特性, スペック, ピン接続図 )

部品番号 HI-8597
部品説明 3.3V Single-Rail ARINC 429 Differential Line Driver
メーカ HOLTIC
ロゴ HOLTIC ロゴ 
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HI-8597 Datasheet, HI-8597 PDF,ピン配置, 機能
July 2015
HI-8597
3.3V Single-Rail ARINC 429 Differential Line Driver
with Integrated DO-160G Level 3 Lightning Protection
GENERAL DESCRIPTION
The HI-8597 is a 3.3V single supply ARINC 429 line driver
with built-in lightning protection. The internal lightning
protection circuitry allows compliance with RTCA/DO-
160G, Section 22 Level 3 Pin Injection Test Waveform
Set A (3 & 4), Set B (3 & 5A) and Set Z (3 & 5B) without
the use of any external components, an industry first.
Pin surge levels for Level 3 are summarized as follows:
Waveform
3
Voc/Isc
600V/24A
Waveform
4
Voc/Isc
300V/60A
Waveform
5A
Voc/Isc
300V/300A
Waveform
5B
Voc/Isc
300V/300A
An internal 37.5 Ohm resistor on each output enables
direct connection to the ARINC 429 bus.
In addition, the device includes a dual polarity voltage
doubler, allowing it to operate from a single +3.3V supply
using only four external capacitors.
Other features include high-impedance outputs (tri-
state) when both data inputs are taken high, allowing
multiple line drivers to be connected to a common bus.
Bus pins feature built-in 8kV ESD input protection (HBM),
with 6kV capability on all other pins. All logic inputs are
5V or 3.3V compatible.
The HI-8597 line driver is intended for use where logic
signals must be converted to ARINC 429 levels such as
when using an FPGA or the HI-3586 ARINC 429 protocol
IC. The single supply operation and internal lightning
protection circuitry enable huge board space saving,
making HI-8597 the most compact, cost effective ARINC
429 line driver on the market today.
The part is available in Industrial -40oC to +85oC, or
Extended, -55oC to +125oC temperature ranges. Optional
burn-in is available on the extended temperature range.
FEATURES
Internal lightning protection circuitry allows
compliance with RTCA/DO-160G, Section 22
Level 3 Pin Injection Test Waveform Set A (3 &
4), Set B (3 & 5A) and Set Z (3 & 5B).
Operates from a single +3.3V supply
Superb short circuit capability on ARINC 429
outputs (±50V for 1 second)
All ARINC 429 voltage levels generated on-chip
Digitally selectable rise and fall times
Tri-state Outputs
37.5 Ohm output resistance allows direct
connection to ARINC 429 bus
Industrial and Extended temperature ranges
Burn-in available
PIN CONFIGURATION (TOP VIEW)
NC 1
GNDA 2
TXAOUT 3
TXBOUT 4
GNDB 5
SLP 6
TX0IN 7
TX1IN 8
HI-8597PSIF
HI-8597PSTF
16 VDD2-
15 CN+
14 CN-
13 GND
12 VDD
11 CP-
10 CP+
9 VDD2+
16-Pin Plastic ESOIC package
(Wide Body)
Table 1.  Function Table
TX1IN
0
0
0
1
1
1
TX0IN
0
1
1
0
0
1
SLP
X
0
1
0
1
X
TXAOUT
0V
-5V
-5V
5V
5V
Hi-Z
TXBOUT
0V
5V
5V
-5V
-5V
Hi-Z
SLOPE
N/A
10μs
1.5μs
10μs
1.5μs
N/A
DS8597 Rev. J.
HOLT INTEGRATED CIRCUITS
www.holtic.com
1
07/15

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HI-8597 pdf, ピン配列
PIN DESCRIPTIONS
HI-8597
Table 2.  Pin Descriptions
Pin No.
1
Pin Name
NC
2 GNDA
3 TXAOUT
4 TXBOUT
5 GNDB
6 SLP
7 TX0IN
8 TX1IN
9 VDD2+
10 CP+
11 CP-
12 VDD
13 GND
14 CN-
15 CN+
16 VDD2-
Function
None
POWER
OUTPUT
OUTPUT
POWER
INPUT
INPUT
INPUT
OUTPUT
ANALOG
ANALOG
POWER
POWER
ANALOG
ANALOG
OUTPUT
Description
No connect.
Ground connection of internal lightning protection circuitry for ARINC
high output. MUST be tied to chip ground pin, GND.
ARINC high output with 37.5 Ohms series resistance
ARINC low output with 37.5 Ohms series resistance
Ground connection of internal lightning protection circuitry for ARINC
low output. MUST be tied to chip ground pin, GND.
Output slew rate control. High selects ARINC 429 high-speed. Low
selects ARINC 429 low-speed.
Data input zero
Data input one
Voltage doubler positive output (~6.25V for 3.3V supply)
VDD2+ flyback capacitor, CFLY; positive terminal
VDD2+ flyback capacitor, CFLY; negative terminal
+3.3V power supply
Ground supply
VDD2- flyback capacitor, CFLY; negative terminal
VDD2- flyback capacitor, CFLY; positive terminal
Voltage doubler negative output (~ -6.1V for 3.3V supply)
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3


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HI-8597 電子部品, 半導体
HI-8597
Table 4.  Converter Characteristics
VDD = +3.3V, TA = Operating Temperature Range (unless otherwise stated)
Parameters
Symbol
Test Conditions
Min Typ Max Units
Start-up transient (V+, V-)
Operating Switching Frequency
Worst case maximum voltage
doubler output
tSTART
- - 10 ms
fsw - 650 - kHz
VDD2+(max)
VDD = 3.6V. T = -55oC. Open
load.
6.93 V
DC/DC convertor capacitor recommendations.
For optimum performance use typical (not min.) values. For EMC compliance, see AN-135.
Ratio of bulk storage to fly-back
capacitors
COUT / CFLY
2.2 10
Fly-back capacitor
(Recommend ceramic, preferably
multilayer, dielectric XR7 caps, 10V min.).
CFLY
CFLY(ESR)
COUT / CFLY >= 10
[0.5, 1.0]Mhz
1.0 4.7
-
μF
500
Bulk storage capacitor
(Recommend ceramic, preferably
multilayer, dielectric XR7 caps, 10V min.).
COUT
COUT(ESR)
COUT / CFLY >= 10
[0.5, 1.0]Mhz
2.2 47 - μF
300
By-pass capacitor
(Recommend ceramic cap, 10V min.).
CSUPPLY
CSUPPLY >= COUT (connect from VDD to GND)
Table 5.  AC Electrical Characteristics
VDD = +3.3V, TA = Operating Temperature Range (unless otherwise stated)
Parameters
Symbol
Test Conditions
Line Driver Propogation Delay
Output high to low
Output low to high
Line Driver Transition Times
High Speed
Output high to low
Output low to high
Low Speed
Output high to low
Output low to high
Input Capacitance (Logic)1
Output Capacitance (Tri-state)1
tphlx defined in Figure 2, no load
tplhx
tfx
trx
tfx
trx
CIN
COUT
SLP pin = Logic “1”
SLP pin = Logic “0”
TX0IN = TX1IN = VDD
Notes: 1. Guaranteed but not tested
Min Typ Max Units
- 500 -
- 500 -
ns
ns
1.0 1.5 2.0
1.0 1.5 2.0
μs
μs
5.0 10.0 15.0
5.0 10.0 15.0
- - 10
- - 10
μs
μs
pF
pF
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