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PDF FDD5N50U Data sheet ( Hoja de datos )
| Número de pieza | FDD5N50U | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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FDD5N50U
N-Channel UniFETTM Ultra FRFETTM MOSFET
500 V, 3 A, 2.0 Ω
November 2013
Features
• RDS(on) = 1.65 Ω (Typ.) @ VGS = 10 V, ID = 1.5 A
• Low Gate Charge (Typ. 11 nC)
• Low Crss (Typ. 5 pF)
• 100% Avalanche Tested
• RoHS Compliant
Applications
• LCD/LED/PDP TV
• Lighting
• Uninterruptible Power Supply
Description
UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche
energy strength. UniFET Ultra FRFETTM MOSFET has much
superior body diode reverse recovery performance. Its trr is less
than 50nsec and the reverse dv/dt immunity is 20V/nsec while
normal planar MOSFETs have over 200nsec and 4.5V/nsec
respectively. Therefore UniFET Ultra FRFET MOSFET can
remove additional component and improve system reliability in
certain applications that require performance improvement of
the MOSFET’s body diode. This device family is suitable for
switching power converter applications such as power factor
correction (PFC), flat panel display (FPD) TV power, ATX and
electronic lamp ballasts.
D
G
S
D
D-PAK
G
S
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
VDSS
VGSS
ID
IDM
EAS
IAR
EAR
dv/dt
PD
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(TC = 25oC)
- Derate Above 25oC
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds
FDD5N50UTM_WS
500
±30
3
1.8
12
275
3
4
4.5
40
0.3
-55 to +150
300
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
FDD5N50UTM_WS
1.4
110
Unit
V
V
A
A
mJ
A
mJ
V/ns
W
W/oC
oC
oC
Unit
oC/W
©2007 Fairchild Semiconductor Corporation
FDD5N50U Rev. C1
1
www.fairchildsemi.com
1 page  
IG = const.
Figure 11. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
VDS
90%
DUT
VGS 10%
td(on)
tr
t on
Figure 12. Resistive Switching Test Circuit & Waveforms
td(off)
tf
t off
VGS
Figure 13. Unclamped Inductive Switching Test Circuit & Waveforms
©2007 Fairchild Semiconductor Corporation
FDD5N50U Rev. C1
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet FDD5N50U.PDF ] | |
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