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MC10210 の電気的特性と機能

MC10210のメーカーはMotorola Semiconductorsです、この部品の機能は「Dual 3-Input/3-Output OR Gate」です。


製品の詳細 ( Datasheet PDF )

部品番号 MC10210
部品説明 Dual 3-Input/3-Output OR Gate
メーカ Motorola Semiconductors
ロゴ Motorola Semiconductors ロゴ 




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MC10210 Datasheet, MC10210 PDF,ピン配置, 機能
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 3-Input/3-Output OR
Gate
The MC10210 is designed to drive up to six transmission lines simul–
taneously. The multiple outputs of this device also allow the wire “OR” –ing of
several levels of gating for minimization of gate and package count.
The ability to control three parallel lines with minimum propagation delay
from a single point makes the MC10210 particularly useful in clock distribution
applications where minimum clock skew is desired.
PD = 160 mW typ/pkg (No Loads)
tpd = 1.5 ns typ (All Output Loaded)
tr, tf = 1.5 ns typ (20%–80%)
LOGIC DIAGRAM
5
6
7
9
10
11
VCC1 = PIN 1, 15
VCC2 = PIN 16
VEE = PIN 8
2
3
4
12
13
14
MC10210
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
AOUT
AIN
AIN
AIN
VEE
1
2
3
4
5
6
7
8
16 VCC2
15 VCC1
14 BOUT
13 BOUT
12 BOUT
11 BIN
10 BIN
9 BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–36 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
3–182
REV 5

1 Page





MC10210 pdf, ピン配列
MC10210
ELECTRICAL CHARACTERISTICS (continued)
@ Test Temperature
–30°C
+25°C
+85°C
VIHmax
–0.890
–0.810
–0.700
TEST VOLTAGE VALUES (Volts)
VILmin
–1.890
VIHAmin VILAmax
–1.205
–1.500
–1.850
–1.105
–1.475
–1.825
–1.035
–1.440
VEE
–5.2
–5.2
–5.2
Characteristic
Power Supply Drain Current
Input Current
Output Voltage
Logic 1
Symbol
IE
IinH
IinL
VOH
Pin
Under
Test
8
5, 6, 7
5, 6, 7
2
3
4
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
VIHmax VILmin VIHAmin VILAmax
*
*
5
6
7
VEE
8
8
8
8
8
8
(VCC)
Gnd
1, 15, 16
1, 15, 16
1, 15, 16
1, 15, 16
1, 15, 16
1, 15, 16
Output Voltage
Logic 0 VOL
2
3
4
8 1, 15, 16
8 1, 15, 16
8 1, 15, 16
Threshold Voltage
Logic 1 VOHA
2
3
4
5 8 1, 15, 16
6 8 1, 15, 16
7 8 1, 15, 16
Threshold Voltage
Logic 0 VOLA
2
3
4
5 8 1, 15, 16
6 8 1, 15, 16
7 8 1, 15, 16
Switching Times
(50Load)
Pulse In Pulse Out –3.2 V
+2.0 V
Propagation Delay
t5+2+
t5–2–
t5+3+
t5–3–
t5+4+
t5–4–
2
2
3
3
4
4
Rise Time
(20 to 80%)
t2+
t3+
t4+
2
3
4
Fall Time
(20 to 80%)
t2–
t3–
t4–
2
3
4
* Individually test each input using the pin connections shown.
5 2 8 1, 15, 16
5 2 8 1, 15, 16
5 3 8 1, 15, 16
5 3 8 1, 15, 16
5 4 8 1, 15, 16
5 4 8 1, 15, 16
5 2 8 1, 15, 16
5 3 8 1, 15, 16
5 4 8 1, 15, 16
5 2 8 1, 15, 16
5 3 8 1, 15, 16
5 4 8 1, 15, 16
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
MOTOROLA
3–184
MECL Data
DL122 — Rev 6


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共有リンク

Link :


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