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HI-3001 の電気的特性と機能

HI-3001のメーカーはHOLTICです、この部品の機能は「1Mbps Avionics CAN Transceiver」です。


製品の詳細 ( Datasheet PDF )

部品番号 HI-3001
部品説明 1Mbps Avionics CAN Transceiver
メーカ HOLTIC
ロゴ HOLTIC ロゴ 




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HI-3001 Datasheet, HI-3001 PDF,ピン配置, 機能
October 2015
HI-3000, HI-3001, HI-3002
1Mbps Avionics CAN Transceiver
with Low Power Standby Mode
GENERAL DESCRIPTION
PIN CONFIGURATIONS (Top Views)
The HI-3000 is a 1 Mbps Controller Area Network (CAN)
transceiver optimized for use in aerospace applications.
It interfaces between a CAN protocol controller and the
physical wires of the bus in a CAN network. Differential
output amplitude and current drive capability are specifi-
cally enhanced to meet the needs of long cable runs typi-
cal of aerospace applications.
The HI-3000 supports two modes of operation: Normal
Mode and Standby Mode. The Standby Mode is a very
low-current mode which continues to monitor bus activity
and allows an external controller to manage wake-up.
Superior common-mode receiver performance makes
the device especially suitable for applications where
ground reference voltages may vary from point to point
over long distances along the CAN bus. In addition, the
HI-3000 provides a SPLIT pin to give an output reference
voltage of VDD/2 which can be used for stabilizing the re-
cessive bus level when the split termination technique is
used to terminate the bus.
A TXD dominant time-out feature also protects the bus
from being driven into a permanent dominant state (so-
called “babbling idiot”) if pin TXD becomes permanently
low due to application failure.
The device also has short circuit protection to +/-58V on
CANH, CANL and SPLIT pins and ESD protection to
+/- 6kV on all pins.
The HI-3001 is identical to the HI-3000 except the SPLIT
pin is substituted with a VIO supply voltage pin. This al-
lows the HI-3001 to interface directly with controllers with
3.3V supply voltages.
The HI-3002 provides both the SPLIT and VIO supply
voltage pins in a compact 16-pin QFN.
All three devices are available in industrial -40oC to +85oC
and extended -55oC to +125oC temperature ranges.
“RoHS compliant” lead-free options are also available
with optional burn-in for the extended temperature range.
TXD - 1
GND - 2
VDD - 3
RXD - 4
HI-3000PSI
HI-3000PST
HI-3000PSM
8 - STB
7 - CANH
6 - CANL
5 - SPLIT
TXD - 1
GND - 2
VDD - 3
RXD - 4
HI-3001PSI
HI-3001PST
HI-3001PSM
8 - STB
7 - CANH
6 - CANL
5 - VIO
8 - PIN PLASTIC NARROW BODY SOIC
GND 1
GND 2
VDD 3
VDD 4
HI-3002PCI
HI-3002PCT
HI-3002PCM
12 CANH
11 CANH
10 CANL
9 CANL
16 - PIN PLASTIC 4 x 4mm QFN
FEATURES
· Compatible with ARINC 825 and ISO 11898-5 standards.
· Signaling rates up to 1Mbit/s.
· Internal VDD/2 voltage source available to stabilize the
recessive bus level if split termination is used (HI-3000
SPLIT pin).
· VIO input on HI-3001 allows for direct interfacing with 3.3V
controllers.
· Detection of permanent dominant on TXD pin (babbling
idiot protection).
· High impedance allows connection of up to 120 nodes.
· Input levels compatible with 3.3V or 5V controllers.
· CANH, CANL and SPLIT pins short-circuit proof to +/-58V.
· Will not disturb the bus if unpowered.
· Extended temperature range and burn-in options for high
reliability applications.
· Compatible with CAN 2.0A & CAN 2.0B Specification
controllers
(DS3000 Rev. F)
HOLT INTEGRATED CIRCUITS
www.holtic.com
10/15

1 Page





HI-3001 pdf, ピン配列
HI-3000, HI-3001, HI-3002
FUNCTIONAL DESCRIPTION
OPERATING MODES
The HI-3000 provides two modes of operation which are
selectable via the STB pin. Table 1 summarizes the modes.
Table 1 - Operating Modes
MODE
STB pin
Normal
Standby
LOW
HIGH
Normal Mode
Normal mode is selected by setting the STB pin to a LOW
logic level (GND). In this mode, the transceiver transmits and
receives data in the usual way from the CANH and CANL bus
lines. The differential receiver converts the analog bus data
to digital data which is output on the RXD pin (Note: the RXD
output on HI-3001 is compatible with 3.3V controllers if the
VIO pin is connected to a 3.3V supply).
Standby Mode
Standby Mode is selected by setting the STB pin to a HIGH
logic level. In this mode, the transmitter is switched off and a
low power differential receiver monitors the bus lines for
activity. A dominant signal of more than 3ms will be reflected
on the RXD pin as a logic LOW, where it may be detected by
the host as a wake-up request. The device will not leave
standby mode until the host forces the STB pin to a logic low.
SPLIT Circuit
The SPLIT pin provides a stable VDD/2 DC voltage. This
pin can be used to stabilize the recessive common mode
voltage by connecting the SPLIT pin to the center tap of the
split termination (see figure 7). In the case of a recessive
bus voltage dropping below the ideal value of VDD/2 (e.g.
due to an unpowered node with high leakage from the bus
lines to ground), the split circuit will force the recessive
voltage to VDD/2.
INTERNAL PROTECTION FEATURES
Short-circuit protection
Short-circuit protection is provided on the CANH, CANL and
SPLIT pins. These pins are protected from ESD to over 6KV
(HBM) and from shorts between -58V and +58V continuous,
as specified in ISO 11898-5. The short circuit current is limited
to less than 200mA typical.
TXD permanent dominant time-out
A timer circuit prevents the bus lines being driven into a
permanent dominant state, which would result in a situation
blocking all bus traffic. This could happen in the case of the
TXD pin becoming permanently low due to a hardware or
application failure. The timer is triggered by a negative edge
on the TXD pin (start of dominant state). If the TXD pin is not
set high (recessive state) after a typical time of 2ms, the
transmitter outputs will be disabled, driving the bus lines into
the recessive state. The timer is reset by a positive edge on
the TXD pin. Note that the minimum TXD dominant time-out
time, tdom = 300μs, defines the minimum possible bit rate of
40kbit/s (the CAN protocol specifies a maximum of 11
successive dominant bits − 5 successive dominant bits
immediately followed by an error frame).
Fail-safe features
Pin TXD has a pull up in order to force a recessive level if pin
TXD is left open.
Pins TXD and STB will become floating if power is lost. This
will prevent reverse currents via these pins.
HOLT INTEGRATED CIRCUITS
3


3Pages


HI-3001 電子部品, 半導体
HI-3000, HI-3001, HI-3002
DC ELECTRICAL CHARACTERISTICS (cont.)
VDD = 5V±5%, Operating temperature range. Positive currents flow into the IC.
PARAMETER
Matching of dominant output voltage,
VDD − VO(CANH) − VO(CANL)
Steady state common mode output voltage
Short-circuit steady-state output current
RECEIVER
Differential receiver threshold voltage
Differential hysteresis voltage
Differential hysteresis voltage in Standby mode
Input leakage current, unpowered node
Differential input resistance
Common mode input resistance
Deviation between common mode input resistance
between CANH and CANL
SYMBOL
CONDITIONS
LIMITS
UNIT
MIN TYP MAX
VOM
VOC(ss)
IOS(ss)
(See Fig. 4)
− 100
-40
150 mV
VSTB = 0V, RL = 60 Ω (See Fig. 5)
2 0.5VDD 3
V
VCANH = +58V, VCANL open
VCANH = -58V, VCANL openV
VCANL = +58V, VCANH open
VCANL = -58V, VCANH open (See Fig. 6)
-20
-200
100
-20
20 mA
100 mA
200 mA
20 mA
VTh(Rx)(diff)
VHys(Rx)(diff)
VHys(Stb)(diff)
ICANH, ICANL
RIN(DIFF)
RIN(CM)
RIN(CM)(m)
− 12 V < VCANH, VCANL < + 12 V
− 12 V < VCANH, VCANL < + 12 V
− 12 V < VCANH, VCANL < + 12 V
VDD = VIO 0 V
VCANH = VCANL = 5V
VTXD = VDD
− 12 V < VCANH, VCANL < + 12 V
VTXD = VDD
− 12 V < VCANH, VCANL < + 12 V
VCANH = VCANL
500 700 900 mV
50 120 200 mV
500 1150 mV
− 200
+ 200 μA
25 50 75 kΩ
15 30 45 kΩ
−3 +3 %
AC ELECTRICAL CHARACTERISTICS
VDD = 5V±5%, Operating temperature range. Positive currents flow into the IC.
PARAMETER
SYMBOL
Bit time
Bit rate
Common mode input capacitance3
Differential input capacitance3
Delay TXD to bus active
Delay TXD to bus inactive
Delay bus active to RXD
Delay bus inactive to RXD
Propagation delay TXD to RXD (recessive to dominant)
Propagation delay TXD to RXD (dominant to recessive)
TXD permanent dominant time-out
TXD permanent dominant timer reset time
tBit
fBit
CIN(CM)
CDIFF(CM)
tdr(TXD)
tdf(TXD)
tdf(RXD)
tdr(RXD)
tProp1
tProp2
tdom
tRdom
Dominant time required on bus for wake up from standby
twake
CONDITIONS
VTXD = VDD, 1Mbit/s data rate
VTXD = VDD, 1Mbit/s data rate
See Timing Diagrans
VTXD = 0 V
Rising edge on TXD while in
permanent dominant state
LIMITS
UNIT
MIN TYP MAX
1 25 μs
40 1000 kHz
20 pF
10 pF
40 90 ns
40 90 ns
30 70 ns
70 150 ns
70 160 ns
110 240 ns
0.3 2
6 ms
1 μs
0.5 3
5 μs
NOTES:
1. All currents into the device pins are positive; all currents out of the device pins are negative.
2. All typicals are given for VDD = 5V, TA = 25°C.
3. Guaranteed by design but not tested.
HOLT INTEGRATED CIRCUITS
6

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共有リンク

Link :


部品番号部品説明メーカ
HI-3000

1Mbps Avionics CAN Transceiver

HOLTIC
HOLTIC
HI-3001

1Mbps Avionics CAN Transceiver

HOLTIC
HOLTIC
HI-3002

1Mbps Avionics CAN Transceiver

HOLTIC
HOLTIC


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