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LC72121MAのメーカーはON Semiconductorです、この部品の機能は「PLL Frequency Synthesizers」です。 |
部品番号 | LC72121MA |
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部品説明 | PLL Frequency Synthesizers | ||
メーカ | ON Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとLC72121MAダウンロード(pdfファイル)リンクがあります。 Total 24 pages
Ordering number : ENA2009
LC72121MA
CMOS IC
PLL Frequency Synthesizers
for Electronic Tuning
http://onsemi.com
Overview
The LC72121MA are high input sensitivity (20mVrms at 130MHz) PLL frequency synthesizers for 3V systems.
These ICs are serial data (CCB) compatible with the LC72131K/KMA, and feature the improved input sensitivity and
lower spurious radiation (provided by a redesigned ground system) required in high-performance AM/FM tuners.
Features
• High-speed programmable divider
• FMIN: 10 to 160MHz ·············· Pulse swallower technique (With built-in divide-by-2 prescaler)
• AMIN: 2 to 40MHz ················ Pulse swallower technique
0.5 to 10MHz ·············· Direct division technique
• IF counter
• IFIN: 0.4 to 15MHz ················ For AM and FM IF counting
• Reference frequency
• One of 12 reference frequencies can be selected (using a 4.5 or 7.2MHz crystal element)
1, 3, 5, 9, 10, 3.125, 6.25, 12.5, 15, 25, 50, and 100kHz
• Phase comparator
• Supports dead zone control. • Built-in unlocked state detection circuit • Built-in deadlock clear circuit
• An MOS transistor for an active low-pass filter is built in.
• I/O ports
• Output-only ports: 4 pins
• I/O ports: 2 pins
• Supports the output of a clock time base signal.
• Serial data I/O
• Support CCB format communication with the system controller.
• Operating ranges
• Supply voltage: 2.7 to 3.6V • Operating temperature: -40 to +85°C
• Package
• MFP24SJ
• CCB is ON Semiconductor® ’s original format. All addresses are managed
by ON Semiconductor® for this format.
• CCB is a registered trademark of Semiconductor Components Industries, LLC.
Semiconductor Components Industries, LLC, 2013
June, 2013
30712HKPC 20120124-S00002 No.A2009-1/24
1 Page LC72121MA
Note 2: Recommended crystal oscillator CI values:
CI ≤ 120Ω (For a 4.5MHz crystal)
CI ≤ 70Ω (For a 7.2MHz crystal)
The characteristics of the oscillation circuit depends on the printed circuit board, circuit constants, and other
factors. Therefore we recommend consulting with the anufacturer of the crystal for evaluation and reliability.
Note 3: Refer to "Serial Data Timing".
Electrical Characteristics in the Allowable Operating Ranges
Parameter
Internal feedback resistance
Internal pull-down resistance
Hysteresis
Output high-level voltage
Output low-level voltage
Input high-level current
Input low-level current
Output off leakage current
High-level 3-state off leakage
current
Low-level 3-state off leakage
current
Input capacitance
Supply current
Symbol
Rf1
Rf2
Rf3
Rf4
Rpd1
Rpd2
VHIS
VOH
VOL1
VOL2
VOL3
VOL4
IIH1
IIH2
IIH3
IIH4
IIH5
IIH6
IIL1
IIL2
IIL3
IIL4
IIL5
IIL6
IOFF1
IOFF2
IOFFH
Pin Conditions
XIN
FMIN
AMIN
IFIN
FMIN
AMIN
CE, CL, DI
PD
PD
BO1 to BO4, IO1, IO2
DO
AOUT
CE, CL, DI
IO1, IO2
XIN
FMIN, AMIN
IFIN
AIN
CE, CL, DI
IO1, IO2
XIN
FMIN, AMIN
IFIN
AIN
BO1 to BO4, AOUT, IO1, IO2
DO
PD
IO=-1mA
IO=1mA
IO=1mA
IO=8mA
IO=1mA
IO=5mA
IO=1mA, AIN=1.3V
VI=6.5V
VI=13V
VI=VDD
VI=VDD
VI=VDD
VI=6.5V
VI=0V
VI=0V
VI=0V
VI=0V
VI=0V
VI=0V
VO=13V
VO=6.5V
VO=VDD
min
100
100
VDD-1.0
1.3
2.5
5.0
1.3
2.5
5.0
IOFFL PD
VO=0V
CIN
IDD1
FMIN
VDD
IDD2
VDD
IDD3
VDD
X’tal=7.2MHz
fIN2=130MHz
VIN2=20mVrms
PLL block stopped
(PLL INHIBIT mode)
Crystal oscillator
operating
(crystal frequency:
7.2 MHz)
PLL block stopped.
Crystal oscillator
stopped.
Ratings
typ
1.0
500
500
250
200
200
0.1VDD
0.01
0.01
6
2.5
0.3
max
400
400
1.0
0.2
1.6
0.2
1.0
0.5
5.0
5.0
8
15
30
200
5.0
5.0
8
15
30
200
5.0
5.0
200
Unit
MΩ
kΩ
kΩ
kΩ
kΩ
kΩ
V
V
V
V
V
V
V
V
μA
μA
μA
μA
μA
nA
μA
μA
μA
μA
μA
nA
μA
μA
nA
200 nA
pF
6 mA
mA
10 μA
No.A2009-3/24
3Pages Pin Descriptions
Pin name
Pin No.
Type
LC72121MA
Function
Equivalent circuit
XIN
XOUT
1
24
X’tal OSC
• Crystal oscillator element connections (4.5 or 7.2 MHz)
FMIN
AMIN
CE
DI
CL
DO
VDD
VSSX
VSSd
BO1
BO2
BO3
BO4
IO1
IO2
• FMIN is selected when DVS in the serial data is set to 1.
• Input frequency: 10 to 160MHz
Local oscillator • The signal is passed through an internal divide-by-two prescaler and
17
signal input
then input to the swallow counter.
• The divisor can be set to a value in the range 272 to 65535. Since the
internal divide-by-two prescaler is used, the actual divisor will be
twice the set value.
• AMIN is selected when DVS in the serial data is set to 0.
• When SNS in the serial data is set to 1:
• Input frequency: 2 to 40MHz
• The signal is input to the swallow counter directly.
16
Local oscillator
signal input
• The divisor can be set to a value in the range 272 to 65535. The set
value becomes the actual divisor.
• When SNS in the serial data is set to 0:
• Input frequency: 0.5 to 10MHz
• The signal is input to a 12-bit programmable divider directly.
• The divisor can be set to a value in the range 4 to 4095. The set
value becomes the actual divisor.
3
Chip enable
• This pin must be set high to enable serial data input (DI) or serial data
output (DO).
4
Input data
• Input for serial data transferred from the controller
5
Clock
• Clock used for data synchronization for serial data input (DI) and
serial data output (DO).
S
S
S
6
Output data
• Output for serial data transmitted to the controller. The content of the
data transmitted is determined by DOC0 through DOC2.
18
Power supply
• LC72121MA power supply (VDD 2.7 to 3.6V)
• The power on reset circuit operates when power is first applied.
-
2
Ground
• Ground for the crystal oscillator circuit
-
15
Ground
• Ground for the LC72121MA digital systems other than those that use
VSSa or VSSX.
• Output-only ports
7
8
9
10
Output port
• The output state is determined by BO1 through BO4 in the serial data.
When the data value is 0: The output state will be the open circuit
state.
When the data value is 1: The output state will be a low level.
• A time base signal (8Hz) is output from BO1 when TBC in the serial
data is set to 1.
• Shared function I/O ports
• The pin function is determined by IOC1 and IOC2 in the serial data.
When the data value 0: Input port
When the data value 1: Output port
• When specified to function as an input port:
The input pin state is reported to the controller through the DO pin.
11
14
I/O port
When the input state is low: The data will be 0:
When the input state is high: The data will be 1:
• When specified to function as an output port:
The output state is determined by IO1 and IO2 in the serial data.
When the data value is 0: The output state will be the open circuit
state.
When the data value is 1: The output state will be a low level.
• These pins are set to input mode after a power on reset.
-
Continued on next page.
No.A2009-6/24
6 Page | |||
ページ | 合計 : 24 ページ | ||
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PDF ダウンロード | [ LC72121MA データシート.PDF ] |
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部品番号 | 部品説明 | メーカ |
LC72121M | PLL Frequency Synthesizers for Electronic Tuning | Sanyo Semicon Device |
LC72121MA | PLL Frequency Synthesizers | ON Semiconductor |