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PDF ISL99125B Data sheet ( Hoja de datos )
| Número de pieza | ISL99125B | |
| Descripción | 25A/35A DrMOS Module | |
| Fabricantes | Intersil | |
| Logotipo |  |
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DATASHEET
25A/35A DrMOS Module with Diode Emulation and PS4
ISL99125B, ISL99135B
The ISL99125B, ISL99135B are high-performance DrMOS
power modules designed for high-frequency power conversion.
By combining a high-performance FET driver and MOSFETs in
an advanced package, high-density DC/DC converters may be
created. Combined with an Intersil PWM controller, a complete
voltage regulator solution can be created with reduced
external components and minimum overall PCB real estate.
ISL99125B, ISL99135B feature a three-state PWM input that,
working together with Intersil’s 5V PWM controllers (such as
ISL6398, ISL9585x, ISL637x, ISL633x, ISL636x and
ISL68201), will provide a robust solution in the event of
abnormal operating conditions.
The ISL99125B, ISL99135B support high-efficiency operations
not only at heavy loads, but also at light loads via its diode
emulation capability. Diode emulation can be disabled for
those applications where variable frequency operation is not
desired at light loads.
ISL99125B, ISL99135B also feature very low shutdown supply
current (3µA) to ensure the low power consumption, especially
designed for IMVP8 PS4 shutdown operation.
Related Literature
• For a full list of related documents, visit our website
- ISL99125B, ISL99135B product pages
Features
• VIN range: 4.5V to 25V
• Current capability: 25A (ISL99125B); 35A (ISL99135B)
• Supports three-state 5.0V PWM input
• 0.5Ω ON-resistance and 4A sink current capability
• Diode emulation for enhanced light-load efficiency
• Ultra low shutdown supply current (3µA) for PS4 operation
• Low three-state hold-off time
• Adaptive shoot-through protection
• Integrated high-side gate-to-source resistor to prevent self
turn-on due to high input bus dv/dt
• VCC undervoltage lockout
• Switching frequencies up to 2MHz
• Pb-free (RoHS compliant)
• 3.5x5 QFN 24 Ld package
Applications
• High-efficiency and high-density VRM and VRD
• Core, graphic and memory regulators for microprocessors
• High-density VR for server, networking and cloud computing
• POL DC/DC converters and video gaming consoles
+5V +12V
VCC
BOOT
PHASE
VIN
PWM
INTERSIL PWM
CONTROLLER
FCCM
PWM
FCCM
SHOOT-
THROUGH
PROTECTION
VCC
SW
GND
ISL991X5
GND
GND
FIGURE 1. SIMPLIFIED APPLICATION BLOCK DIAGRAM
LOUT
COUT
VOUT
October 14, 2016
FN8848.2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2016. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL99125B, ISL99135B
Typical Application Circuit with ISL95855
GT
VCORE
VCCS E NS E_ GT
VSSS E NS E_ GT
SA
VCORE
VCCSENSE_SA
VSSSENSE_SA
VIN
BOOT
V+5
ISL99135 B
VCC
FCCM
PWM
VIN
BOOT
ISL99135 B
VCC
FCCM
PWM
°C
°C
VIN
BOOT
V+5
ISL99135 B
VCC
FCCM
PWM
°C
VIN +5V
VIN VCC
PWM2_B
FCCM_A
PWM1_A
FCCM_B
PWM1_B
ISUMP_B
PWM2_A
ISUMN_B
ISEN1_B
ISEN2_B
COMP_B
FB_B
RTN_B
IMON_B
NTC_B
PWM3_A
ISUMP_A
ISUMN_A
ISEN3_A
ISEN2_A
ISEN1_A
COMP_A
ISL95855
FB_A
FCCM_C
RTN_A
+5V
ISL99135 B
VCC
FCCM
VIN
BOOT
PWM
ISL99135 B
VCC
FCCM
VIN
BOOT
PWM
ISL99135 B
VCC
FCCM
VIN
BOOT
PWM
°C
CPU
VCORE
VCCS E NS E_ CP U
VSSSENSE_CPU
PWM_C
IMON_A
ISUMP_C
ISUMN_C
COMP_C
NTC_A
VR_HOT#
FB_C
RTN_C
VR_READY
VR_ENABLE
°C
VR_HOT#
VR_READY
VR_ENABLE
IMON_C
SDA
PROG1
PROG2
PROG3
PROG4
ALERT#
NTC1 NETWORK IS NOT NEEDED
ISFCLTKMS IS USED FOR VR1, GPU
PROG5
GND
PSYS
SDA
ALERT#
SCLK
PSYS
FIGURE 5. TYPICAL APPLICATION CIRCUIT WITH ISL95855
Submit Document Feedback
5
FN8848.2
October 14, 2016
5 Page 
ISL99125B, ISL99135B
other circuits. Best practice is to place the decoupling
capacitors on the same PCB side as the device.
• Connect GND to the system ground plane with a large via array
as close to the GND pins as the design rules allow. This
improves thermal and electrical performance.
• Place VCC and BOOT-PHASE decoupling capacitors at the IC
pins as shown in Figure 20.
• Note that the SW plane connecting the ISL99125B,
ISL99135B and inductor must carry a full load current and will
create resistive loss if not sized properly. However, it is also a
very noisy node that should not be oversized or routed close to
any sensitive signals. Best practice is to place the inductor as
close to the device as possible and thus, minimizing the
required area for the SW connection. If one must choose a
long route of either the VOUT side of the inductor or the SW
side, choose the quiet VOUT side. Best practice is to locate the
ISL99125B, ISL99135B as close to the final load as possible
and thus avoid noisy or lossy routes to the load.
EVALUATION BOARDS
ISL68201-99125DEMO1Z
ISL68201-99135DEMO1Z
TABLE 3. AVAILABLE EVALUATION BOARDS
DESCRIPTION
3.3V at 16A design with ISL99125B and the ISL68201 digital hybrid PWM controller.
1.0V at 20A design with ISL99135B and the ISL68201 digital hybrid PWM controller.
SMBus/
PMBus/I2C
Yes
Yes
24 23 22 21 20 19
PWM 1
FCCM 2
BOOT 3
GH 4
PHASE 5
VIN
PAD2
GND
PAD1
18 17
6 7 8 9 10 11 12
16 SW
15 SW
14 SW
13 SW
FIGURE 20. PCB LAYOUT FOR MINIMIZING CURRENT LOOPS
Submit Document Feedback 11
FN8848.2
October 14, 2016
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ISL99125B.PDF ] | |
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