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HI-6136 の電気的特性と機能

HI-6136のメーカーはHOLTICです、この部品の機能は「Compact Multi-Terminal Device」です。


製品の詳細 ( Datasheet PDF )

部品番号 HI-6136
部品説明 Compact Multi-Terminal Device
メーカ HOLTIC
ロゴ HOLTIC ロゴ 




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HI-6136 Datasheet, HI-6136 PDF,ピン配置, 機能
November, 2016
MAMBATM: HI-6136
3.3V RT / MT MIL-STD-1553 / MIL-STD-1760
Compact Multi-Terminal Device with SPI Host Interface
GENERAL DESCRIPTION
The 3.3V CMOS HI-6136 device is a member of
Holt’s MIL-STD-1553 MAMBATM family and provides
a complete single- or multi-function interface between
a host processor and MIL-STD-1553B bus. Each IC
contains a Remote Terminal (RT) and a Bus Monitor
Terminal (MT). Any combination of the contained 1553
functions can be enabled for concurrent operation. The
enabled terminals communicate with the MIL-STD-1553
buses through a shared on-chip dual bus transceiver and
external transformers. The user allocates 16K bytes of
on-chip static RAM between devices to suit application
requirements.
Built-in self-test for protocol logic, digital signal
paths and internal RAM.
Optional self-initialization at reset uses external
serial EEPROM.
±8kV ESD Protection (HBM, all pins).
Two temperature ranges: -40oC to +85oC, or
-55oC to +125oC with optional burn-in.
RoHS compliant and Tin / Lead options available.
PIN CONFIGURATION (TOP)
The HI-6136 communicates with the host via a 40 MHz
4-wire serial peripheral interface (SPI). Programmable
interrupts provide terminal status to the host processor.
Circular data buffers in RAM have interrupts for rollover
and programmable “level attained”.
The HI-6136 can be configured for automatic self-
initialization after reset. A dedicated SPI port reads
data from an external serial EEPROM to fully configure
registers and RAM and optionally start execution for any
of the terminal devices.
MODE - 1
IRQ - 2
ACKIRQ - 3
MODE1760 - 4
READY - 5
VCC - 6
GND - 7
ACTIVE - 8
RTSSF - 9
AUTOEN - 10
TXINHA - 11
TXINHB - 12
HI-6136PCIF
HI-6136PCTF
HI-6136PCMF
36 - TTCLK
35 - ESCLK
34 - EECOPY
33 - ECS
32 - MOSI
31 - VCC
30 - GND
29 - MISO
28 - MTTCLK
27 - LOCK
26 - RTA4
25 - RTA3
FEATURES
Concurrent multi-terminal operation for RT and/or
MT MIL-STD-1553B functions.
8K x 17-bit words internal static RAM with parity
Autonomous terminal operation requires minimal
host intervention.
40 MHz SPI Host Interface.
MIL-STD-1760 option sets Busy bit in Status
Word response during initialization.
World’s smallest MIL-STD-1553 terminal, QFN
package measures just 6mm x 6mm.
Simple Monitor Terminal (SMT) Mode records
commands and data separately, with 16-bit or 48-
bit time tagging.
Independent 16-bit time tag counters and clock
sources for RT and MT. The MT also has a 48-bit
time count option.
64-Word Interrupt Log Buffer queues the most
recent 32 interrupts. Hardware-assisted interrupt
decoding quickly identifies interrupt sources.
48 - Pin Plastic 6mm x 6mm
Chip-Scale Package (QFN)
See Section 24.1 on page 202 for 48-Pin PQFP Configuration
DS6136 Rev. E
HOLT INTEGRATED CIRCUITS
www.holtic.com
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HI-6136 pdf, ピン配列
HI-6136
Table of Contents
1. BLOCK DIAGRAM............................................................................................ 12
2. FEATURE OVERVIEW .................................................................................... 13
2.1. Remote Terminal Operation....................................................................................... 13
2.2. Monitor Terminal Operation........................................................................................ 13
2.3. Interrupts.................................................................................................................... 13
2.4. Reset and Initialization............................................................................................... 13
3. PIN DESCRIPTIONS........................................................................................ 14
4. MEMORY MAP.................................................................................................. 17
5. RAM STRUCTURES ........................................................................................ 18
5.1. Interrupt Log Data Buffer........................................................................................... 18
5.2. Monitor Terminal Temporary Buffers A & B................................................................ 18
5.3. Monitor Terminal (MT) Address List........................................................................... 18
5.4. Monitor Terminal (MT) Message Filter Table.............................................................. 18
5.5. Monitor Terminal (MT) Data Buffers........................................................................... 18
5.6. RT Command Illegalization Table.............................................................................. 18
5.7. RT Descriptor Table................................................................................................... 18
5.8. RT Temporary Receive Buffer.................................................................................... 19
5.9. RT Message Data Buffers.......................................................................................... 19
5.10. RT Storage for Mode Code Commands..................................................................... 19
6. HARDWARE FEATURES ................................................................................. 20
6.1. Remote Terminal Address Inputs............................................................................... 20
6.2. Dual Transceivers for MIL-STD-1553 Bus................................................................. 20
6.3. Encoder and Decoders.............................................................................................. 20
6.4. Auto-Initialization Serial EEPROM Interface.............................................................. 20
6.5. Transmit Time-out Fail-Safe Counter......................................................................... 20
6.6. MIL-STD-1760 Mode................................................................................................. 20
7. REGISTER & MEMORY ADDRESSING........................................................... 21
8. REGISTER DEFINITIONS................................................................................ 21
HOLT INTEGRATED CIRCUITS
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3Pages


HI-6136 電子部品, 半導体
HI-6136
14.4.4. Receive Mode Control Word................................................................................ 105
14.4.5. Transmit Mode Control Word................................................................................ 108
15. REMOTE TERMINAL MESSAGE DATA BUFFERS........................................111
15.1. Subaddress Message Information Words ............................................................... 112
15.1.1. Receive Subaddress Command .......................................................................... 112
15.1.2. Transmit Subaddress Command ......................................................................... 114
15.2. Mode Command Message Information Words........................................................ 116
15.2.1. Receive Mode Command .................................................................................... 116
15.2.2. Transmit Mode Command ................................................................................... 118
15.3. Ping-Pong Data Buffering........................................................................................ 120
15.3.1. Double Buffered (Ping-Pong) Mode..................................................................... 120
15.3.2. Ping-Pong Enable / Disable Handshake.............................................................. 121
15.3.3. Broadcast Message Handling in Ping-Pong Mode............................................... 123
15.4. Indexed Data Buffer Mode....................................................................................... 125
15.4.1. Single Message Mode.......................................................................................... 125
15.4.2. Broadcast Message Handling in Index Mode....................................................... 125
15.5. Circular Buffer Mode 1............................................................................................. 129
15.6. Circular Buffer Mode 2............................................................................................. 133
16. REMOTE TERMINAL MODE COMMAND PROCESSING............................. 138
16.1. General Considerations........................................................................................... 138
16.2. Mode Command Interrupts...................................................................................... 138
16.3. Mode Command Data Words.................................................................................. 139
16.4. Standard Mode Command Processing.................................................................... 141
16.5. Simplified Mode Command Processing................................................................... 141
17. SERIAL EEPROM PROGRAMMING UTILITY................................................ 143
17.1. Writing the Auto-Initialization EEPROM................................................................... 143
17.2. Overall 8K Word Checksum Used by Auto-Initialization.......................................... 145
17.3. Fast Initialization Option using EE2K Pin................................................................. 146
18. RESET AND INITIALIZATION......................................................................... 147
18.1. Hardware Master Reset and Optional Auto-Initialization......................................... 147
18.2. Initialization using EE2K Pin.................................................................................... 150
18.3. Memory Test Fail Address Register (0x0024)........................................................ 150
18.4. Software Reset........................................................................................................ 151
18.4.1. Remote Terminal ................................................................................................. 151
HOLT INTEGRATED CIRCUITS
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