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PDF UPD789327 Data sheet ( Hoja de datos )

Número de pieza UPD789327
Descripción 8-BIT SINGLE-CHIP MICROCONTROLLER
Fabricantes NEC 
Logotipo NEC Logotipo



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No Preview Available ! UPD789327 Hoja de datos, Descripción, Manual

PRELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
µPD789322,789324,789326,789327
8-BIT SINGLE-CHIP MICROCONTROLLER
The µPD789322, 789324, 789326, and 789327 are µPD789327 Subseries (designed for remote controller with on-
chip LCD) product in the 78K/0S Series.
In addition to an 8-bit CPU, they have on-chip hardware for a remote controller with on-chip LCD, Including a LCD
controller/driver, a serial interface, a key return signal detection circuit, and timers with carrier generator that can
easily output waveforms for infrared remote control.
The µPD78F9328, a product with on-chip flash memory which can operate on the same supply voltage as for
masked ROM products and various development tools are also under development.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
µPD789327, 789467 Subseries User’s Manual: To be prepared
78K/0S Series User’s Manual Instructions: U11047E
FEATURES
• ROM and RAM size
Item Program memory
Data Memory
Packege
Part Number
(ROM)
Internal High-Speed LCD display RAM
RAM
µPD789322
µPD789324
4 K bytes
8 K bytes
256 bytes
24 bytes
52-pin plastic LQFP
(10×10 mm)
µPD789326
16 K bytes
512 bytes
µPD789327
24 K bytes
• Variable minimum instruction execution time: High speed (0.4 µs: @5.0-MHz operation with main system clock),
low speed (1.6 µs: @5.0-MHz operation with main system clock), and ultra low speed (122 µs: @32.768-kHz
operation with subsystem clock)
• I/O ports: 21
• Serial interface (3-wire serial I/O mode): 1 channel
• LCD controller/driver
Segment signals: 24
Common signals: 4
• Timer: 4 channels
• Supply voltage: VDD = 1.8 to 5.5 V
APPLICATIONS
Remote-control devices, healthcare equipment, etc.
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U14673EJ1V0PM00 (1st edition)
Date Published March 2000 NS CP(K)
Printed in Japan
2000

1 page




UPD789327 pdf
µPD789322,789324,789326,789327
OVERVIEW OF FUNCTIONS
Item
Internal memory ROM
High-speed RAM
LCD display RAM
Main system clock
(oscillation frequency)
Subsystem clock
(oscillation frequency)
Minimum instruction execution time
General-purpose registers
Instruction set
I/O ports
Timers
Timer outputs
Serial interface
LCD controller/driver
Vectored interrupt
sources
Reset
Maskable
Non-maskable
Supply voltage
Operating ambient temperature
Package
µPD789322
µPD789324
µPD789326
4 Kbytes
8 Kbytes
16 Kbytes
256 bytes
512 bytes
24 bytes
Ceramic/crystal resonator (1.0 to 5.0 MHz)
Crystal resonator (32.768 kHz)
0.4 µs/1.6 µs (@5.0-MHz operation with main system clock)
122 µs (@32.768-kHz operation with subsystem clock)
8 bits × 8 registers
16-bit operations
Bit manipulation (set, reset, test) etc.
Total:
CMOS I/O:
21
21
8-bit timer:
2 channels
Watch timer: 1 channel
Watchdog timer: 1 channel
1
3-wire serial I/O mode: 1 channel
Segment signal outputs: 24
Common signal outputs: 4
Internal: 6, External: 2
Internal: 1
Reset by RESET signal input
Internal reset by watchdog timer
Reset via power-on-clear circuit
VDD = 1.8 to 5.5 V
TA = 40 to +85°C
52-pin plastic LQFP (10×10 mm)
µPD789327
24 Kbytes
Preliminary Product Information U14673EJ1V0PM00
5

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UPD789327 arduino
µPD789322,789324,789326,789327
3.2 Non-Port Pins
Pin Name
INT
I/O
Input
KR00 to KR03 Input
TO40
Output
SCK10
I/O
SI10
Input
SO10
Output
S0 to S16
Output
S17 to S22
S23
COM0 to COM3 Output
VLC0
X1
X2
XT1
XT2
RESET
VDD
VSS
IC0
Input
Input
Input
Function
After Reset Alternate Function
External interrupt input for which the valid edge (rising edge, Input
falling edge, or both rising and falling edges) can be specified.
P61
Key return signal detection
Input
P40 to P43
8-bit timer 40 output
Input
P60
Serial clock input/output of serial interface 10
Input
P20
Serial data input of serial interface 10
Input
P22
Serial data output of serial interface 10
Input
P21
LCD controller/driver segment signal outputs
Low-level
output
P85 to P80
LCD controller/driver common signal outputs
Low-level
output
LCD drive voltage
−−
Connecting crystal resonator for main system clock oscillation
−−
Connecting crystal resonator for subsystem clock oscillation
−−
System reset input
Input
Positive power supply
−−
Ground potential
−−
Internally connected. Connect to VSS directly.
−−
Preliminary Product Information U14673EJ1V0PM00
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