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PDF SG3527A Data sheet ( Hoja de datos )
| Número de pieza | SG3527A | |
| Descripción | PULSE WIDTH MODULATOR CONTROL CIRCUITS | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Order this document by SG3525A/D
Pulse Width
Modulator Control Circuits
The SG3525A, SG3527A pulse width modulator control circuits offer
improved performance and lower external parts count when implemented for
controlling all types of switching power supplies. The on–chip +5.1 V
reference is trimmed to ±1% and the error amplifier has an input
common–mode voltage range that includes the reference voltage, thus
eliminating the need for external divider resistors. A sync input to the
oscillator enables multiple units to be slaved or a single unit to be
synchronized to an external system clock. A wide range of deadtime can be
programmed by a single resistor connected between the CT and Discharge
pins. These devices also feature built–in soft–start circuitry, requiring only an
external timing capacitor. A shutdown pin controls both the soft–start circuitry
and the output stages, providing instantaneous turn off through the PWM
latch with pulsed shutdown, as well as soft–start recycle with longer
shutdown commands. The under voltage lockout inhibits the outputs and the
changing of the soft–start capacitor when VCC is below nominal. The output
stages are totem–pole design capable of sinking and sourcing in excess of
200 mA. The output stage of the SG3525A features NOR logic resulting in a
low output for an off–state while the SG3527A utilized OR logic which gives a
high output when off.
• 8.0 V to 35 V Operation
• 5.1 V ± 1.0% Trimmed Reference
• 100 Hz to 400 kHz Oscillator Range
• Separate Oscillator Sync Pin
• Adjustable Deadtime Control
• Input Undervoltage Lockout
• Latching PWM to Prevent Multiple Pulses
• Pulse–by–Pulse Shutdown
• Dual Source/Sink Outputs: ±400 mA Peak
Representative Block Diagram
16
Vref
15
VCC
12
Ground
4
OSC Output
Sync
RT
CT
Discharge
3
6
5
7
Compensation
INV. Input
Noninv. Input
CSoft–Start
9
1
2
8
10
Shutdown
Reference
Regulator
Oscillator
–Error
Amp
+
5.0k
To Internal
Circuitry
Under–
Voltage
Lockout
Q
F/F Q
+
– PWM
–
50µA
R
S
Latch
S
VREF
5.0k
VC
13
Output A
NOR 11
NOR 14
Output B
SG3525A Output Stage
13
VC
Output A
OR 11
Output B
OR 14
SG3527A
Output Stage
SG3525A
SG3527A
PULSE WIDTH MODULATOR
CONTROL CIRCUITS
SEMICONDUCTOR
TECHNICAL DATA
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648
16
1
DW SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16L)
PIN CONNECTIONS
Inv. Input 1
Noninv. Input 2
Sync 3
OSC. Output 4
CT 5
RT 6
Discharge 7
Soft–Start 8
16 Vref
15 VCC
14 Output B
13 VC
12 Ground
11 Output A
10 Shutdown
9 Compensation
(Top View)
ORDERING INFORMATION
Device
Operating
Temperature Range Package
SG3525AN
Plastic DIP
SG3525ADW TA = 0° to +70°C
SG3527AN
SO–16L
Plastic DIP
MOTOROLA ANALOG IC DEVICE DATA
© Motorola, Inc. 1996
Rev 2
1
1 page  
SG3525A SG3527A
Figure 1. Oscillator Charge Time versus RT
200
100
50
20 * RD = 0 Ω
10
5.0
2.0
2.0
5.0 10
6 5 RD * 7
RT CT
20 50 100 200 500 1000 2000 5000 10,000
CHARGE TIME (µs)
Figure 2. Oscillator Discharge Time versus RD
500
400
300
200
100
0
0.2 0.5 1.0 2.0 5.0 10 20
DISCHARGE TIME (µs)
50 100 200
100
80
60
40
20
0
–20
1.0
Figure 3. Error Amplifier Open Loop
Frequency Response
1–
2+
9
CP
RZ
RZ = 20 k
10 100 1.0 k 10 k 100 k 1.0 M 10 M
f, FREQUENCY (Hz)
Figure 4. Output Saturation
Characteristics (SG3525A)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.01
VCC = +20 V
TJ = +25°C
Source Sat, (VC–VOH)
Sink Sat, (VOL)
0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1.0
IO, OUTPUT SOURCE OR SINK CURRENT (A)
Figure 5. Oscillator Schematic (SG3525A)
Vref 16
Q1
Q5 Q8
7.4k
RT 6
CT
5
3
Sync
7
Discharge
Q2
12
Gnd
Q3
Q6
2.0k
5.0pF
400µA
Q4
23k
Q7
1.0k
Q9
2.0k 14k
Q10 Q11
Ramp
To PWM
25k Blanking
Q14 To Output
1.0k
Q12
Q13
3.0k
250
4
OSC Output
Figure 6. Error Amplifier Schematic (SG3525A)
15
VCC
Q3
Inverting
Input
Q1
1
Noninverting
Input
2
200µA
Q4
Q2
100µA
To PWM
Comparator
5.8V 30
9 Compensation
MOTOROLA ANALOG IC DEVICE DATA
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet SG3527A.PDF ] | |
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