9FGU0631 Datasheet PDF - IDT
| Part Number | 9FGU0631 | |
| Description | 6-O/P 1.5V PCIe Gen 1-2-3 Clock Generator | |
| Manufacturers | IDT | |
| Logo |  |
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6-O/P 1.5V PCIe Gen 1-2-3 Clock Generator 9FGU0631
DATASHEET
Description
The 9FGU0631 is a member of IDT's 1.5V Ultra-Low-Power
PCIe clock family. The device has 6 output enables for clock
management, 2 different spread spectrum levels in addition to
spread off and 2 selectable SMBus addresses.
Recommended Application
1.5V PCIe Gen1-2-3 Clock Generator
Output Features
• 6 - 100MHz Low-Power (LP) HCSL DIF pairs
• 1 - 1.5V LVCMOS REF output w/Wake-On-LAN (WOL)
support
Key Specifications
• DIF cycle-to-cycle jitter <50ps
• DIF output-to-output skew <60ps
• DIF phase jitter is PCIe Gen2 and Gen3 compliant
• REF phase jitter is < 3.0ps RMS
Block Diagram
Features/Benefits
• LP-HCSL outputs; save 12 resistors compared to standard
PCIe devices
• 45mW typical power consumption; reduced thermal
concerns
• Outputs can optionally be supplied from any voltage
between 1.05 and 1.5V; maximum power savings
• OE# pins; support DIF power management
• Programmable Slew rate for each output; allows tuning for
various line lengths
• Programmable output amplitude; allows tuning for various
application environments
• DIF outputs blocked until PLL is locked; clean system
start-up
• Selectable 0%, -0.25% or -0.5% spread on DIF outputs;
reduces EMI
• External 25MHz crystal; supports tight ppm with 0 ppm
synthesis error
• Configuration can be accomplished with strapping pins;
SMBus interface not required for device control
• Selectable SMBus addresses; multiple devices can easily
share an SMBus segment
• 3.3V tolerant SMBus interface works with legacy controllers
• Space saving 40-pin 5x5 mm VFQFPN; minimal board
space
XIN/CLKIN_25
X2
vOE(5:0)#
OSC
vSADR
vSS_EN_tri
^CKPWRGD_PD#
SDATA_3.3
SCLK_3.3
CONTROL
LOGIC
SS Capable PLL
REF1.5
DIF5
DIF4
DIF3
DIF2
DIF1
DIF0
9FGU0631 OCTOBER 18, 2016
1 ©2016 Integrated Device Technology, Inc.
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9FGU0631 DATASHEET
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 9FGU0631. These ratings, which are standard
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage
VDDxx
Applies to all VDD pins
Input Voltage
VIN
Input High Voltage, SMBus VIHSMB
Storage Temperature
Ts
SMBus clock and data pins
Junction Temperature
Tj
Input ESD protection ESD prot
Human Body Model
1Guaranteed by design and characterization, not 100% tested in production.
2 Operation under these conditions is neither implied nor guaranteed.
3 Not to exceed 2.5V.
MIN
-0.5
-0.5
-65
2000
TYP
MAX
2
VDD+0.5V
3.3V
150
125
UNITS
V
V
V
°C
°C
V
NOTES
1,2
1,3
1
1
1
1
Electrical Characteristics–Current Consumption
TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Operating Supply Current
IDDAOP
IDDOP
VDDA, All outputs active @100MHz
All VDD, except VDDA and VDDIO, All outputs
active @100MHz
6.0 9 mA
8.8 14 mA
IDDIOOP
VDDIO, All outputs active @100MHz
21
Wake-on-LAN Current
(CKPWRGD_PD# = '0'
Byte 3, bit 5 = '1')
IDDAPD
IDDPD
IDDIOPD
VDDA, DIF outputs off, REF output running
All VDD, except VDDA and VDDIO,
DIF outputs off, REF output running
VDDIO, DIF outputs off, REF output running
0.4
4.7
0.04
Powerdown Current
IDDAPD
VDDA, all outputs off
0.4
(CKPWRGD_PD# = '0'
Byte 3, bit 5 = '0')
IDDPD All VDD, except VDDA and VDDIO, all outputs off
IDDIOPD
VDDIO, all outputs off
0.4
0.0003
1 Guaranteed by design and characterization, not 100% tested in production.
2 This is the current required to have the REF output running in Wake-on-LAN mode (Byte 3, bit 5 = 1)
30
1
7.5
0.1
1
1
0.1
mA
mA
mA
mA
mA
mA
mA
2
2
2
Electrical Characteristics–DIF Output Duty Cycle, Jitter, and Skew Characteristics
TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Duty Cycle
tDC Measured differentially, PLL Mode
Skew, Output to Output
tsk3
Averaging on, VT = 50%
Jitter, Cycle to cycle
tjcyc-cyc
1Guaranteed by design and characterization, not 100% tested in production.
2 Measured from differential waveform
45 50 55 %
32 60 ps
16 50 ps
1,2
1
1,2
OCTOBER 18, 2016
5 6-O/P 1.5V PCIE GEN 1-2-3 CLOCK GENERATOR
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 9FGU0631 electronic component. |
| Information | Total 15 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ 9FGU0631.PDF Datasheet ] | |
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