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8P73S674 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 8P73S674
部品説明 1.8V LVPECL Clock Divider
メーカ IDT
ロゴ IDT ロゴ 



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8P73S674 Datasheet, 8P73S674 PDF,ピン配置, 機能
1.8V LVPECL Clock Divider
8P73S674
DATA SHEET
General Description
The 8P73S674 is a 1.8V LVPECL Clock Divider and Fanout Buffer.
The device has been designed for clock signal division and fanout in
wireless base station (radio and base band), high-end computing and
telecommunication equipment. The device is optimized to deliver
excellent phase noise performance. The 8P73S674 uses SiGe
technology for an optimum of high clock frequency and low phase
noise performance, combined with high power supply noise rejection.
The device offers the frequency division by ÷1, ÷2, ÷4 and ÷8. Four
low-skew 1.8V LVPECL outputs are available for and support clock
output frequencies up to 1GHz (÷1 frequency division). 1.8V LVPECL
outputs are terminated 50to GND. Outputs can be disabled to save
power consumption if not used. The device is packaged in a lead-free
(RoHS 6) 20-lead VFQFN package. The extended temperature range
supports wireless infrastructure, telecommunication and networking
end equipment requirements. The device is a member of the
high-performance clock family from IDT.
Features
Clock signal division and distribution
SiGe technology for high-frequency and fast signal rise/fall times
Four low-skew LVPECL clock outputs
Supports frequency division of ÷1, ÷2, ÷4 and ÷8
Maximum Output frequency: 1GHz
Output skew: 100ps (maximum)
LVPECL output rise/fall time (20% - 80%): 220ps (maximum)
1.8V core and output supply mode
Supports 1.8V I/O LVCMOS logic levels for all control pins
-40°C to +85°C ambient operating temperature
Lead-free (RoHS 6) 20-lead VFQFN packaging
Block Diagram
IN
nIN
VT
N[1:0]
nOEA
nOEB
2x 50
÷N
8P73S674 REVISION 1 12/17/14
Pin Assignment
Q0
nQ0
 
20 19 18 17 16
nIN 1
Q1
nQ1 NC 2
15 nQ1
14 Q1
Q2
VT 3
8P73S674
13 nQ2
nQ2
IN 4
12 Q2
Q3
nQ3
N0 5
11 VCC
6 7 8 9 10
20-pin, 2.15mm x 2.15mm, EPad, VFQFN Package
1 ©2014 Integrated Device Technology, Inc.

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1.8V LVPECL Clock Divider

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