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ADP1762 の電気的特性と機能

ADP1762のメーカーはAnalog Devicesです、この部品の機能は「CMOS Linear Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADP1762
部品説明 CMOS Linear Regulator
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADP1762 Datasheet, ADP1762 PDF,ピン配置, 機能
Data Sheet
FEATURES
2 A maximum output current
Low input voltage supply range
VIN = 1.10 V to 1.98 V, no external bias supply required
Fixed output voltage range: VOUT_FIXED = 0.9 V to 1.5 V
Adjustable output voltage range: VOUT_ADJ = 0.5 V to 1.5 V
Ultralow noise: 2 μV rms, 100 Hz to 100 kHz
Noise spectral density
4 nV/√Hz at 10 kHz
3 nV/√Hz at 100 kHz
Low dropout voltage: 62 mV typical at 2 A load
Operating supply current: 4.5 mA typical at no load
±1.5% fixed output voltage accuracy over line, load, and
temperature
Excellent power supply rejection ratio (PSRR) performance
62 dB typical at 10 kHz at 2 A load
46 dB typical at 100 kHz at 2 A load
Excellent load/line transient response
Soft start to reduce inrush current
Optimized for small 10 μF ceramic capacitors
Current-limit and thermal overload protection
Power-good indicator
Precision enable
16-lead, 3 mm × 3 mm LFCSP package
APPLICATIONS
Regulation to noise sensitive applications such as radio
frequency (RF) transceivers, analog-to-digital converter
(ADC) and digital-to-analog converter (DAC) circuits,
phase-locked loops (PLLs), voltage controlled oscillators
(VCOs) and clocking integrated circuits
Field-programmable gate array (FPGA) and digital signal
processor (DSP) supplies
Medical and healthcare
Industrial and instrumentation
GENERAL DESCRIPTION
The ADP1762 is a low noise, low dropout (LDO) linear regulator. It
is designed to operate from a single input supply with an input
voltage as low as 1.10 V, without the requirement of an external
bias supply, to increase efficiency and provide up to 2 A of
output current.
The low 62 mV typical dropout voltage at a 2 A load allows the
ADP1762 to operate with a small headroom while maintaining
regulation and providing better efficiency.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
2 A, Low VIN, Low Noise,
CMOS Linear Regulator
ADP1762
TYPICAL APPLICATION CIRCUITS
VIN = 1.7V
CIN
10µF
RPULL-UP
100k
PG
ADP1762
VIN VOUT
SENSE
EN
PG
SS VADJ
VOUT = 1.5V
COUT
10µF
ON
OFF
CSS
10nF
CREG
1µF
VREG
REFCAP
GND
CREF
1µF
Figure 1. Fixed Output Operation
VIN = 1.7V
CIN
10µF
RPULL-UP
100k
PG
ADP1762
VIN VOUT
SENSE
EN
PG
SS VADJ
CSS
10nF
CREG
1µF
VREG
REFCAP
GND
VOUT = 1.5V
COUT
10µF
ON
OFF
CREF
1µF
RADJ
10k
Figure 2. Adjustable Output Operation
Table 1. Related Devices
Device
Input
Maximum
Voltage Current
ADP1761 1.10 V to 1 A
1.98 V
ADP1763 1.10 V to 3 A
1.98 V
ADP1740/ 1.6 V to
ADP1741 3.6 V
2A
ADP1752/ 1.6 V to
ADP1753 3.6 V
0.8 A
ADP1754/ 1.6 V to
ADP1755 3.6 V
1.2 A
Fixed/
Adjustable
Fixed/adjustable
Fixed/adjustable
Fixed/adjustable
Fixed/adjustable
Fixed/adjustable
Package
16-lead
LFCSP
16-lead
LFCSP
16-lead
LFCSP
16-lead
LFCSP
16-lead
LFCSP
The ADP1762 is optimized for stable operation with small 10 μF
ceramic output capacitors. The ADP1762 delivers optimal
transient performance with minimal board area.
The ADP1762 is available in fixed output voltages ranging from
0.9 V to 1.5 V. The output of the adjustable output model can be
set from 0.5 V to 1.5 V through an external resistor connected
between VADJ and ground.
The ADP1762 has an externally programmable soft start time by
connecting a capacitor to the SS pin. Short-circuit and thermal
overload protection circuits prevent damage in adverse conditions.
The ADP1762 is available in a small 16-lead LFCSP package for the
smallest footprint solution to meet a variety of applications.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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ADP1762 pdf, ピン配列
ADP1762
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
General Description ......................................................................... 1 
Typical Application Circuits............................................................ 1 
Revision History ............................................................................... 2 
Specifications..................................................................................... 3 
Input and Output Capacitor: Recommended Specifications.. 4 
Absolute Maximum Ratings............................................................ 5 
Thermal Data ................................................................................ 5 
Thermal Resistance ...................................................................... 5 
ESD Caution.................................................................................. 5 
Pin Configuration and Function Descriptions............................. 6 
Typical Performance Characteristics ............................................. 7 
Theory of Operation ...................................................................... 11 
REVISION HISTORY
4/16—Revision 0: Initial Version
Data Sheet
Soft Start Function ..................................................................... 11 
Adjustable Output Voltage ........................................................ 12 
Enable Feature ............................................................................ 12 
Power-Good (PG) Feature ........................................................ 12 
Applications Information .............................................................. 13 
Capacitor Selection .................................................................... 13 
Undervoltage Lockout ............................................................... 14 
Current-Limit and Thermal Overload Protection................. 14 
Thermal Considerations............................................................ 14 
PCB Layout Considerations...................................................... 17 
Outline Dimensions ....................................................................... 18 
Ordering Guide .......................................................................... 18 
Rev. 0 | Page 2 of 18


3Pages


ADP1762 電子部品, 半導体
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
VIN to GND
EN to GND
VOUT to GND
SENSE to GND
VREG to GND
REFCAP to GND
VADJ to GND
SS to GND
PG to GND
Storage Temperature Range
Operating Temperature Range
Operating Junction Temperature
Lead Temperature (Soldering, 10 sec)
Rating
−0.3 V to +2.16 V
−0.3 V to +3.96 V
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to +3.96 V
−65°C to +150°C
−40°C to +125°C
125°C
300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL DATA
Absolute maximum ratings apply only individually, not in
combination. The ADP1762 may be damaged when junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that the junction temperature is within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may need to be derated.
In applications with moderate power dissipation and low printed
circuit board (PCB) thermal resistance, the maximum ambient
temperature can exceed the maximum limit as long as the junction
temperature is within specification limits. The junction
temperature (TJ) of the device is dependent on the ambient
temperature (TA), the power dissipation of the device (PD), and the
junction to ambient thermal resistance of the package (θJA). TJ is
calculated using the following formula:
TJ = TA + (PD × θJA)
The junction to ambient thermal resistance (θJA) of the package
is based on modeling and a calculation using a 4-layer board.
ADP1762
The junction to ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending on
PCB material, layout, and environmental conditions. The specified
values of θJA are based on a 4-layer, 4 in × 3 in circuit board. For
details about board construction, refer to JEDEC JESD51-7.
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
a calculation using a 4-layer board. The JEDEC JESD51-12
document, Guidelines for Reporting and Using Package Thermal
Information, states that thermal characterization parameters are
not the same as thermal resistances. ΨJB measures the component
power flowing through multiple thermal paths rather than a single
path, as in thermal resistance (θJB). Therefore, ΨJB thermal paths
include convection from the top of the package as well as radiation
from the package, factors that make ΨJB more useful in real-world
applications. The maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD), using
the following formula:
TJ = TB + (PD × ΨJB)
Refer to the JEDEC JESD51-8 and JESD51-12 documents for
more detailed information about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance for a 4-Layer 6400 mm2
Copper Size
Package Type
θJA ΨJB
Unit
16-Lead LFCSP
56 28.4
°C/W
ESD CAUTION
Rev. 0 | Page 5 of 18

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共有リンク

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