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ADP7156 の電気的特性と機能

ADP7156のメーカーはAnalog Devicesです、この部品の機能は「RF Linear Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADP7156
部品説明 RF Linear Regulator
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADP7156 Datasheet, ADP7156 PDF,ピン配置, 機能
Data Sheet
1.2 A, Ultralow Noise,
High PSRR, RF Linear Regulator
ADP7156
FEATURES
Input voltage range: 2.3 V to 5.5 V
16 standard voltages between 1.2 V and 3.3 V available
Maximum load current: 1.2 A
Low noise
0.9 μV rms total integrated noise from 100 Hz to 100 kHz
1.6 μV rms total integrated noise from 10 Hz to 100 kHz
Noise spectral density: 1.7 nV/√Hz from 10 kHz to 1 MHz
Power supply rejection ratio (PSRR)
80 dB from 1 kHz to 100 kHz; 60 dB at 1 MHz, VOUT = 3.3 V,
VIN = 4.0 V
Dropout voltage: 120 mV typical at IOUT = 1.2 A, VOUT = 3.3 V
Initial accuracy: ±0.6% at ILOAD = 10 mA
Initial accuracy over line, load, and temperature: ±1.5%
Quiescent current: IGND = 4.0 mA at no load, 7 mA at 1.2 A
Low shutdown current: 0.2 μA
Stable with a 10 μF ceramic output capacitor
10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages
Precision enable
Supported by ADIsimPower tool
APPLICATIONS
Regulation to noise sensitive applications: phase-locked
loops (PLLs), voltage controlled oscillators (VCOs), and
PLLs with integrated VCOs
Communications and infrastructure
Backhaul and microwave links
GENERAL DESCRIPTION
The ADP7156 is a linear regulator that operates from 2.3 V to 5.5 V
and provides up to 1.2 A of output current. Using an advanced
proprietary architecture, it provides high power supply rejection
and ultralow noise, achieving excellent line and load transient
response with only a 10 μF ceramic output capacitor.
There are 16 standard output voltages for the ADP7156. The
following voltages are available from stock: 1.2 V, 1.8 V, 2.0 V,
2.5 V, 2.8 V, 3.0 V and 3.3 V. Additional voltages available by
special order are 1.3 V, 1.5 V, 1.6 V, 2.2 V, 2.6 V, 2.7 V, 2.9 V,
3.1 V, and 3.2 V.
The ADP7156 regulator typical output noise is 0.9 μV rms
from 100 Hz to 100 kHz and 1.7 nV/√Hz for noise spectral
density from 10 kHz to 1 MHz. The ADP7156 is available in a
10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages,
making it not only a very compact solution, but also providing
excellent thermal performance for applications requiring up to
1.2 A of output current in a small, low profile footprint.
TYPICAL APPLICATION CIRCUIT
VIN = 3.8V
CIN
10µF
ON
OFF
CBYP
1µF
ADP7156
VIN VOUT
VOUT_SENSE
EN
BYP
REF
REF_SENSE
VOUT = 3.3V
COUT
10µF
CREF
1µF
CREG
1µF
VREG
GND (EPAD)
Figure 1.
Table 1. Related Devices
Model
Input
Voltage
ADP7158, 2.3 V to 5.5 V
ADP7159
ADP7157 2.3 V to 5.5 V
ADM7150,
ADM7151
ADM7154,
ADM7155
ADM7160
4.5 V to 16 V
2.3 V to 5.5 V
2.2 V to 5.5 V
Output
Current
2A
1.2 A
800 mA
600 mA
200 mA
Fixed/
Adj1
Fixed/
Adj
Fixed/
Adj
Fixed/
Adj
Fixed/
Adj
Fixed
Package
10-lead LFCSP/
8-lead SOIC
10-lead LFCSP/
8-lead SOIC
8-lead LFCSP/
8-lead SOIC
8-lead LFCSP/
8-lead SOIC
6-lead LFCSP/
5-lead TSOT
1 Adj means adjustable.
1k
CBYP = 1µF
CBYP = 10µF
CBYP = 100µF
100 CBYP = 1000µF
10
1
0.1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 2. Noise Spectral Density at Different Values of CBYP, VOUT = 3.3 V
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 Page





ADP7156 pdf, ピン配列
ADP7156
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Typical Application Circuit ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Input and Output Capacitors, Recommended Specifications 4
Absolute Maximum Ratings............................................................ 5
Thermal Data ................................................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 13
REVISION HISTORY
5/2016—Rev. 0 to Rev. A
Changes to Table 2............................................................................ 3
Changes to Programmable Precision Enable Section................ 16
Changes to Current-Limit and Thermal Shutdown Section .... 17
3/2016—Revision 0: Initial Version
Data Sheet
Applications Information .............................................................. 14
ADIsimPower Design Tool ....................................................... 14
Capacitor Selection .................................................................... 14
Undervoltage Lockout (UVLO) ............................................... 15
Programmable Precision Enable .............................................. 16
Start-Up Time ............................................................................. 17
REF, BYP, and VREG Pins......................................................... 17
Current-Limit and Thermal Shutdown................................... 17
Thermal Considerations............................................................ 17
Printed Circuit Board (PCB) Layout Considerations................ 20
Outline Dimensions ....................................................................... 21
Ordering Guide .......................................................................... 22
Rev. A | Page 2 of 22


3Pages


ADP7156 電子部品, 半導体
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
VIN to Ground
VREG to Ground
VOUT to Ground
VOUT_SENSE to Ground
VOUT to VOUT_SENSE
BYP to VOUT
EN to Ground
BYP to Ground
REF to Ground
REF_SENSE to Ground
Storage Temperature Range
Operational Junction Temperature
Range
Soldering Conditions
Rating
−0.3 V to +7 V
−0.3 V to VIN, or +4 V
(whichever is less)
−0.3 V to VREG, or +4 V
(whichever is less)
−0.3 V to VREG, or +4 V
(whichever is less)
±0.3 V
±0.3 V
−0.3 V to +7 V
−0.3 V to VREG, or +4 V
(whichever is less)
−0.3 V to VREG, or +4 V
(whichever is less)
−0.3 V to +4 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP7156 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient tempera-
ture does not guarantee that TJ is within the specified temperature
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
need to be derated.
In applications with moderate power dissipation and low
printed circuit board (PCB) thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long as
the junction temperature is within specification limits. The
junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction to ambient thermal resistance of the
package (θJA).
Calculate the maximum junction temperature (TJ) from the
ambient temperature (TA) and power dissipation (PD) using
the following formula:
TJ = TA + (PD × θJA)
ADP7156
Junction to ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction to ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending
on PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit
board. See JESD51-7 and JESD51-9 for detailed information on
the board construction.
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power
flowing through multiple thermal paths rather than a single
path as in thermal resistance, θJB. Therefore, ΨJB thermal paths
include convection from the top of the package as well as
radiation from the package, factors that make ΨJB more useful
in real-world applications. Maximum junction temperature (TJ)
is calculated from the board temperature (TB) and power
dissipation (PD) using the following formula:
TJ = TB + (PD × ΨJB)
See JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA, θJC, and ΨJB are specified for the worst case conditions, that
is, a device soldered in a circuit board for surface-mount
packages.
Table 5. Thermal Resistance
Package Type
θJA θJC ΨJB Unit
10-Lead LFCSP
53.8 15.6 29.1 °C/W
8-Lead SOIC
50.4 42.3 30.1 °C/W
ESD CAUTION
Rev. A | Page 5 of 22

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共有リンク

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部品番号部品説明メーカ
ADP7156

RF Linear Regulator

Analog Devices
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ADP7157

RF Linear Regulator

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ADP7158

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ADP7159

RF Linear Regulator

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