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PDF 8T49N1012 Data sheet ( 特性 )

部品番号 8T49N1012
部品説明 Frequency Synthesizer
メーカ Integrated Device Technology
ロゴ Integrated Device Technology ロゴ 

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8T49N1012 Datasheet, 8T49N1012 PDF,ピン配置, 機能
FemtoClock® NG 12-Output
Frequency Synthesizer
8T49N1012
Datasheet
General Description
The 8T49N1012 has one fractional-feedback PLL that can be used
for frequency synthesis. It is equipped with two integer and eight
fractional output dividers, allowing the generation of up to ten
different output frequencies, ranging from 8kHz to 1GHz. Eight of
these frequencies are completely independent of each other and the
inputs. Two more are related frequencies. The twelve outputs may
select among LVPECL, LVDS, HSCL or LVCMOS output levels.
This functionality makes it ideal to be used in any frequency
synthesis application, including 1G, 10G, 40G and 100G
Synchronous Ethernet, OTN, and SONET/SDH, including ITU-T
G.709 (2009) FEC rates.
The device supports Output Enable inputs and Lock and LOS status
outputs.
The device is programmable through an I2C interface. It also
supports I2C master capability to allow the register configuration to
be read from an external EEPROM.
Applications
OTN or SONET / SDH equipment Line cards (up to OC-192, and
supporting FEC ratios)
Gigabit and Terabit IP switches / routers
Wireless base station baseband
Data communications
Features
<350fs RMS typical jitter (including spurs), @122.88MHz (12kHz
to 20MHz)
Operating modes: locked to input signal and free-run
Operates from a 10MHz to 40MHz fundamental-mode crystal
Accepts one LVPECL, LVDS, LVHSTL, HCSL or LVCMOS input
clock
Accepts frequencies ranging from 10MHz up to 600MHz
Clock input monitoring
Generates 12 LVPECL / LVDS / HSCL or 24 LVCMOS output
clocks
Output frequencies ranging from 8kHz up to 1.0GHz (Q[8:11],
Differential)
Output frequencies ranging from 8kHz to 250MHz (LVCMOS)
Two Output Enable control inputs
Lock and Loss-of-Signal status outputs
Programmable output de-skew adjustments in steps as small as
16ps
Register programmable through I2C or via external I2C EEPROM
Bypass clock paths and Reference Output for system tests
Power supply modes:
VCC
3.3V
/ VCCA
/ 3.3V
/
/
3V.C3CVO
3.3V / 3.3V / 2.5V
3.3V / 3.3V / 1.8V (LVCMOS)
2.5V / 2.5V / 3.3V
2.5V / 2.5V / 2.5V
2.5V / 2.5V / 1.8V (LVCMOS)
-40°C to 85°C ambient operating temperature
Package: 72QFN, lead-free RoHs (6)
©2016 Integrated Device Technology, Inc.
1
October 28, 2016

1 Page





8T49N1012 pdf, ピン配列
Pin Assignment for 72-pin, 10mm x 10mm VFQFN Package
REF_OUT
VCCA
OSCI
OSCO
LOCK
VCCO10
Q11
nQ11
Q10
nQ10
nc
Rsvd
VCCO8
Q9
nQ9
Q8
nQ8
Rsvd
72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55
1 54
2
3
4
5
6 8XXXXXX
7
8
9
10
11
12
13
14
15
16
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
17 38
18 37
19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
PLL_BYP
nc
Q0
nQ0
VCCO0
VCCO1
Q1
nQ1
nc
Rsvd
nc
VCCO2
Q2
nQ2
nc
VCCO3
Q3
nQ3
Figure 2. Pinout Drawing
8T49N1012 Datasheet
©2016 Integrated Device Technology, Inc.
3
October 28, 2016


3Pages


8T49N1012 電子部品, 半導体
8T49N1012 Datasheet
Table 1. Pin Descriptions1 (Continued)
Number
Name
Type
Description
71
nCLK
Input
Pullup/
Pulldown
Inverting differential clock input. Internal resistor bias to VCC/2.
72
CLK
Input
Pulldown Non-inverting differential clock input.
ePAD
VEE_EP
Power
Exposed pad of package. All ground pins and EPAD must be connected
before any positive supply voltage is applied.
NOTE 1. Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics 1
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input Capacitance2
Internal Pullup Resistor
Internal Pulldown Resistor
LVCMOS; Q[0:7]
LVCMOS;
Q[8:11]
Test Conditions
VCCOx = 3.465V
VCCOx = 3.465V
LVCMOS; Q[0:7]
VCCOx = 2.625V
LVCMOS;
Q[8:11]
Power
CPD
Dissipation
Capacitance
LVCMOS; [0:7]
LVCMOS;
(per output pair) Q[8:11]
VCCOx = 2.625V
VCCOx = 1.89V
VCCOx = 1.89V
LVDS, HSCL,
LVPECL or Hi-Z;
Q[0:7]
VCCOx = 3.465V or 2.625V
LVDS, HSCL,
LVPECL or Hi-Z;
Q[8:11]
VCCOx = 3.465V or 2.625V
ROUT
Output
Impedance
LOCK, LOS
Q[0:11],
nQ[0:11]
VCCCS = 3.3V
VCCCS = 2.5V
LVCMOS Operation Selected
REF_OUT
NOTE 1. VCCOx denotes: VCCO0 through VCCO8, VCCO10.
NOTE 2. This specification does not apply to OSCI and OSCO pins.
Minimum
Typical
3.5
51
51
17
14
15
13
15
11.5
Maximum
Units
pF
k
k
pF
pF
pF
pF
pF
pF
4.5 pF
2.5 pF
43
52
22
30
©2016 Integrated Device Technology, Inc.
6
October 28, 2016

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