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PDF PTAC240502FC Data sheet ( Hoja de datos )
| Número de pieza | PTAC240502FC | |
| Descripción | Thermally-Enhanced High Power RF LDMOS FET | |
| Fabricantes | Infineon | |
| Logotipo |  |
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PTAC240502FC
Thermally-Enhanced High Power RF LDMOS FET
50 W, 28 V, 2300 – 2400 MHz
Description
The PTAC240502FC is a 47-watt LDMOS FET with an
asymmetrical design intended for use in multi-standard cellular
power amplifier applications in the 2300 to 2400 MHz frequency
band. Features include dual-path design, input matching, high gain
and thermally-enhanced package with earless flanges. Manu-
factured with Infineon's advanced LDMOS process, this device
provides excellent thermal performance and superior reliability.
Two-carrier WCDMA Drive-up
VDD = 28 V, IDQ = 120 mA, VGS1 = 2.6 V,
VGS2 = 1.3 V, ƒ = 2400 MHz, 3GPP WCDMA
signal, PAR = 8 dB, 10 MHz carrier spacing,
BW 3.84 MHz
16
60
15
Gain
14
50
40
13
Efficiency
12
30
20
11 10
10
26
ptac240502fc_g1
0
30 34 38 42 46
Output Power (dBm)
PTAC240502FC
Package H-37248-4
Features
• Input matched
• Asymmetric Doherty design
- Main: P1dB = 17 W Typ
- Peak: P1dB = 33 W Typ
• Typical Pulsed CW performance, 2350 MHz,
28 V, 160 µs pulse width, 10% duty cycle,
Doherty Configuration
- Output power at P1dB = 45.7 W
- Efficiency = 46.2%
- Gain = 14.6 dB
• Typical single-carrier WCDMA performance,
2350 MHz, 28 V, 8.4 dB PAR @ 0.01% CCDF
- Output power = 8.91 W
- Efficiency = 44.2%
- Gain = 14.2 dB
- ACPR = –31 dBc @ 5 MHz
• Capable of handling 10:1 VSWR @28 V, 50 W
(CW) output power
• Integrated ESD protection : Human Body Model,
Class 1B (per JESD22-A114)
• Low thermal resistance
• Pb-free and RoHS compliant
RF Characteristics
Two-carrier WCDMA Specifications (tested in Infineon Doherty test fixture)
VDD = 28 V, IDQ = 120 mA, POUT = 10 W avg, VGS2 = 1.3 V, ƒ1 = 2345 MHz, ƒ2 = 2355 MHz, 3GPP signal,
channel bandwidth = 3.84 MHz, peak/average = 8 dB @ 0.01% CCDF
Characteristic
Linear Gain
Drain Efficiency
Intermodulation Distortion
Symbol
Gps
hD
IMD
All published data at TCASE = 25°C unless otherwise indicated
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Data Sheet
1 of 8
Min
13
41
—
Typ
14.3
44
–33
Max
—
—
–25
Unit
dB
%
dBc
Rev. 02.3, 2016-06-21
1 page  
PTAC240502FC
Reference Circuit , 2300 – 2400 MHz
VG1 PTAC240502FC
IN_01_D
RO4350, .020 (194)
C105 C103
R103
RF_IN
C104
U1
R105 C106
R104
VG2
R102
R101
C102
C101
Reference circuit assembly diagram (not to scale)
RO4350, .020 (194)
C201
C214
C212
C213
VDD
C205 C208
C207
C206
C203
C204
RF_OUT
C202
OUT_01_D
PTAC240502FC
C209
C210
C211
VDD
ptac240502fc_CD_11-05-2013
Data Sheet
5 of 8
Rev. 02.3, 2016-06-21
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PTAC240502FC.PDF ] | |
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