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MCP3912 の電気的特性と機能

MCP3912のメーカーはMicrochipです、この部品の機能は「3V Four-Channel Analog Front End」です。


製品の詳細 ( Datasheet PDF )

部品番号 MCP3912
部品説明 3V Four-Channel Analog Front End
メーカ Microchip
ロゴ Microchip ロゴ 




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MCP3912 Datasheet, MCP3912 PDF,ピン配置, 機能
MCP3912
3V Four-Channel Analog Front End
Features:
• Four Synchronous Sampling 24-bit Resolution
Delta-Sigma A/D Converters
• 93.5 dB SINAD, -107 dBc Total Harmonic
Distortion (THD) (up to 35th Harmonic), 112 dBFS
SFDR for Each Channel
• Enables 0.1% Typical Active Power Measurement
Error over a 10,000:1 Dynamic Range
• Advanced Security Features:
- 16-Bit Cyclic Redundancy Check (CRC)
Checksum on All Communications for Secure
Data Transfers
- 16-Bit CRC Checksum and Interrupt Alert for
Register Map Configuration
- Register Map lock with 8-Bit Secure Key
• 2.7V-3.6V AVDD, DVDD
• Programmable Data Rate up to 125 ksps:
- 4 MHz Maximum Sampling Frequency
- 16 MHz Maximum Master Clock
• Oversampling Ratio up to 4096
• Ultra-Low Power Shutdown Mode with < 10 µA
• -122 dB Crosstalk between Channels
• Low-Drift 1.2V Internal Voltage Reference:
9 ppm/°C
• Differential Voltage Reference Input Pins
• High Gain PGA on Each Channel (up to 32 V/V)
• Phase Delay Compensation with 1 µs Time
Resolution
• Separate Data Ready Pin for Easy
Synchronization
• Individual 24-Bit Digital Offset and Gain Error
Correction for Each Channel
• High-Speed 20 MHz SPI Interface with Mode 0,0
and 1,1 Compatibility
• Continuous Read/Write Modes for Minimum
Communication Time with Dedicated 16/32-Bit
Modes
• Available in 28-Lead QFN and 28-Lead SSOP
Packages
• Extended Temperature Range: -40°C to +125°C
Description:
The MCP3912 is a 3V four-channel Analog Front End
(AFE) containing four synchronous sampling delta-
sigma, Analog-to-Digital Converters (ADC), four PGAs,
phase delay compensation block, low-drift internal
voltage reference, digital offset and gain error
calibration registers and high-speed 20 MHz
SPI-compatible serial interface.
The MCP3912 ADCs are fully configurable, with
features such as 16/24-bit resolution, Oversampling
Ratio (OSR) from 32 to 4096, gain from 1x to 32x,
independent Shutdown and Reset, dithering and auto-
zeroing. The communication is largely simplified with 8-
bit commands, including various continuous read/write
modes and 16/24/32-bit data formats that can be
accessed by the Direct Memory Access (DMA) of an
8/16- or 32-bit MCU, and with the separate Data Ready
pin that can directly be connected to an Interrupt
Request (IRQ) input of an MCU.
The MCP3912 includes advanced security features to
secure the communications and the configuration
settings, such as a CRC-16 checksum on both serial
data outputs and static register map configuration. It
also includes a register-map lock through an 8-bit
secure key to stop unwanted write commands from
processing.
The MCP3912 is capable of interfacing with a variety of
voltage and current sensors, including shunts, current
transformers, Rogowski coils and Hall-effect sensors.
Applications:
• Polyphase Energy Meters
• Energy Metering and Power Measurement
• Automotive
• Portable Instrumentation
• Medical and Power Monitoring
• Audio/Voice Recognition
2014 Microchip Technology Inc.
DS20005348A-page 1

1 Page





MCP3912 pdf, ピン配列
MCP3912
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD ..................................................................... -0.3V to 4.0V
Digital inputs and outputs w.r.t. AGND................. -0.3V to 4.0V
Analog input w.r.t. AGND ..................................... ....-2V to +2V
VREF input w.r.t. AGND ............................... -0.6V to VDD +0.6V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-65°C to +125°C
Soldering temperature of leads (10 seconds) ............. +300°C
ESD on all pins (HBM,MM) .................................... 4 kV, 300V
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other condi-
tions, above those indicated in the operational listings
of this specification, is not implied. Exposure to maxi-
mum rating conditions for extended periods may affect
device reliability.
1.1 Electrical Specifications
TABLE 1-1: ANALOG SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V, MCLK = 4 MHz;
PRE<1:0> = 00; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, DITHER<1:0> = 11; BOOST<1:0> = 10, VCM = 0V;
TA = -40°C to +125°C; VIN = -0.5 dBFS @ 50/60 Hz on all channels.
Characteristic
Sym.
Min. Typ. Max. Units
Conditions
ADC Performance
Resolution
(No missing codes)
24 —
bits OSR = 256 or greater
Sampling Frequency
fS(DMCLK)
1
4
MHz For maximum condition,
BOOST<1:0> = 11
Output Data Rate
fD(DRCLK)
4 125 ksps For maximum condition,
BOOST<1:0> = 11,
OSR = 32
Analog Input Absolute
Voltage on CHn+/- pins,
n between 0 and 3
CHn+/-
-1 — +1
V All analog input channels,
measured to AGND
Analog Input
Leakage Current
IIN
— +/-1 —
nA RESET<3:0> = 1111,
MCLK running continuously
Differential Input
Voltage Range
Offset Error
Offset Error Drift
(CHn+-CHn-) -600/GAIN — +600/GAIN mV VREF = 1.2V,
proportional to VREF
VOS
-1 0.2
1
mV Note 5
— 0.5 — µV/°C
Gain Error
GE
-5 — +5
% Note 5
Gain Error Drift
— 1 — ppm/°C
Note 1:
2:
3:
4:
5:
6:
7:
8:
Dynamic Performance specified at -0.5 dB below the maximum differential input value,
VIN = 1.2 VPP = 424 mVRMS @ 50/60 Hz, VREF = 1.2V. See Section 4.0 “Terminology And Formulas” for definition.
This parameter is established by characterization and not 100% tested.
For these operating currents, the following configuration bit settings apply: SHUTDOWN<3:0> = 0000,
RESET<3:0> = 0000, VREFEXT = 0, CLKEXT = 0.
For these operating currents, the following configuration bit settings apply: SHUTDOWN<3:0> = 1111, VREFEXT = 1,
CLKEXT = 1.
Measured on one channel versus all others channels. The average of crosstalk performance over all channels
(see Figure 2-32 for individual channel performance).
Applies to all gains. Offset and gain errors depend on PGA gain setting, see typical performance curves for typical
performance.
Outside of this range, ADC accuracy is not specified. An extended input range of +/-2V can be applied continuously to
the part with no damage.
For proper operation and for optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in
Table 5-2, as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the prescaler
settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE in the defined range in Table 5-2.
This parameter is established by characterization and not 100% tested.
2014 Microchip Technology Inc.
DS20005348A-page 3


3Pages


MCP3912 電子部品, 半導体
MCP3912
TABLE 1-1: ANALOG SPECIFICATIONS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V, MCLK = 4 MHz;
PRE<1:0> = 00; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, DITHER<1:0> = 11; BOOST<1:0> = 10, VCM = 0V;
TA = -40°C to +125°C; VIN = -0.5 dBFS @ 50/60 Hz on all channels.
Characteristic
Sym.
Min. Typ. Max. Units
Conditions
Operating Current, Analog
(Note 2)
IDD,A
Operating Current, Digital
IDD,D
Shutdown Current, Analog
Shutdown Current, Digital
Pull-down Current on
OSC2 Pin (External Clock
mode only)
IDDS,A
IDDS,D
IOSC2
— 2.8
4
— 3.4 4.5
— 4.7 6.4
— 8.1 11.8
— 0.28 0.6
— 1.1 —
— 0.01
2
— 0.01
4
— 35 —
mA BOOST<1:0> = 00
mA BOOST<1:0> = 01
mA BOOST<1:0> = 10
mA BOOST<1:0> = 11
mA MCLK = 4 MHz,
proportional to MCLK (Note 2)
mA MCLK = 16 MHz,
proportional to MCLK (Note 2)
µA AVDD pin only (Note 3) (Note 8)
µA DVDD pin only (Note 3) (Note 8)
µA CLKEXT = 1
Note 1:
2:
3:
4:
5:
6:
7:
8:
Dynamic Performance specified at -0.5 dB below the maximum differential input value,
VIN = 1.2 VPP = 424 mVRMS @ 50/60 Hz, VREF = 1.2V. See Section 4.0 “Terminology And Formulas” for definition.
This parameter is established by characterization and not 100% tested.
For these operating currents, the following configuration bit settings apply: SHUTDOWN<3:0> = 0000,
RESET<3:0> = 0000, VREFEXT = 0, CLKEXT = 0.
For these operating currents, the following configuration bit settings apply: SHUTDOWN<3:0> = 1111, VREFEXT = 1,
CLKEXT = 1.
Measured on one channel versus all others channels. The average of crosstalk performance over all channels
(see Figure 2-32 for individual channel performance).
Applies to all gains. Offset and gain errors depend on PGA gain setting, see typical performance curves for typical
performance.
Outside of this range, ADC accuracy is not specified. An extended input range of +/-2V can be applied continuously to
the part with no damage.
For proper operation and for optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in
Table 5-2, as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the prescaler
settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE in the defined range in Table 5-2.
This parameter is established by characterization and not 100% tested.
1.2 Serial Interface Characteristics
TABLE 1-2: SERIAL DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all parameters apply at DVDD = 2.7 to 3.6 V,
TA = -40°C to +125°C, CLOAD = 30 pF, applies to all digital I/O.
Characteristic
Sym.
Min.
Typ. Max. Units
Conditions
High-Level Input Voltage
Low-Level Input Voltage
Input Leakage Current
Output Leakage Current
Hysteresis Of
Schmitt-Trigger Inputs
VIH
VIL
ILI
ILO
VHYS
0.7 DVDD
——
— 0.3 DVDD
— ±1
— — ±1
— 500 —
V Schmitt-Triggered
V Schmitt-Triggered
µA CS = DVDD,
VIN = DGND to DVDD
µA CS = DVDD,
VOUT = DGND or DVDD
mV DVDD = 3.3V only, Note 2
Low-Level Output Voltage
VOL
— — 0.2 DVDD V IOL = +1.7 mA
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is established by characterization and not production tested.
DS20005348A-page 6
2014 Microchip Technology Inc.

6 Page



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