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PDF ASM3P2853A Data sheet ( Hoja de datos )
| Número de pieza | ASM3P2853A | |
| Descripción | Peak EMI Reducing Solution | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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ASM3P2853A
Peak EMI Reducing Solution
Features
• Generates an EMI optimized clock signal at output.
• Input frequency: 25MHz.
• Frequency outputs:
o USB Clock (48MHz unmodulated)
o 50MHz (modulated), ±1% centre spread
• Modulation rate: 39KHz.
• Spread Spectrum ON/OFF control
• Supply voltage range 2.5V ± 5%.
• Available in 8-Pin SOIC package.
Product Description
The ASM3P2853A is a versatile spread spectrum
frequency modulator. The ASM3P2853A reduces
electromagnetic interference (EMI) at the clock source.
The ASM3P2853A allows significant system cost savings
by reducing the number of circuit board layers and
shielding that are required to pass EMI regulations. The
ASM3P2853A modulates the output of PLL in order to
spread the bandwidth of a synthesized clock, thereby
decreasing the peak amplitudes of its harmonics. This
results in significantly lower system EMI compared to the
typical narrow band signal produced by oscillators and
most clock generators. Lowering EMI by increasing a
signal’s bandwidth is called spread spectrum clock
generation.
Applications
ASM3P2853A is targeted towards EMI management for
high speed digital applications such as PC peripheral
devices, consumer electronics and embedded controller
systems.
Block Diagram
VDD
PWDNB
XIN
XOUT
SSONB
Crystal
Oscillator
VSS
PLL1
PLL2
USB Clock
(48MHz
Unmodulated)
50MHz
Modulated
©2010 SCILLC. All rights reserved.
FEBRUARY 2012 – Rev. 3
Publication Order Number:
ASM3P2853/D
1 page  
ASM3P2853A
AC Electrical Characteristics
Parameter
Symbol
Rise Time1
tr
Fall Time1
Jitter
(Cycle-to-Cycle)
Jitter
(Period)
tf
tjc
tp
Clock Duty Cycle
td
Power-up time
tON
Conditions / Description
Measured from 20% to 80% of the
signal level
Measured from 80% to 20% of the
signal level
Ratio of pulse width (as measured from
rising edge to next falling edge at
VDD/2) to one clock period
first locked cycle after power-up
(With stable VDD and valid input clock)
Note: 1. CL = 15 pF, Input clock frequency = 25MHz
Min
-
-
-
-
45
-
Typ Max
2-
1.5 -
250 -
175 -
50 55
-5
Unit
nS
nS
pS
pS
%
mS
Typical Application Schematic using ASM3P2853A Device
25MHz
fundamental
Crystal
+2.5V
27pF
0.1uF
1 XIN
50MHz 8
27pF
2 XOUT USB Clock 7
3 VDD
SSONB 6
B
4 VSS
PWDNB 5
ASM3P2853A
Modulated 50MHz output
Un-modulated 48MHz output
Rev. 2 | Page 5 of 7 | www.onsemi.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet ASM3P2853A.PDF ] | |
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