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MCD2926 の電気的特性と機能

MCD2926のメーカーはMC Devicesです、この部品の機能は「18MHz-650MHz Dual Frequency Synthesizer」です。


製品の詳細 ( Datasheet PDF )

部品番号 MCD2926
部品説明 18MHz-650MHz Dual Frequency Synthesizer
メーカ MC Devices
ロゴ MC Devices ロゴ 




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MCD2926 Datasheet, MCD2926 PDF,ピン配置, 機能
MC Devices®
MCD2926
18MHz-650MHz Dual Frequency Synthesizer
General Description
The MCD2926 is a high performance dual
frequency synthesizer with high frequency prescaler
for RF operation frequency from 18MHz to
650MHz. The MCD2926 contains two dual
modulus prescalers, three programmable counters,
one crystal oscillator, two phase detectors and two
programmable charge pumps, one MCU serial
interface. The on-chip prescalers and dividers
consist of a completed phase-lock-loop (PLL),
which is combined with on board VCO and LPF.
Users can lock any targeted frequency by setting
proper division with an external MCU. It has been
proven that MCD2926 can work stably within the
range of -40 to +85 degrees.
Typical Applications
FRS, PCS, Cordless phones
Portable wireless systems and other wireless
communication systems
Features
Operating Frequency: 18MHz~650MHz
Operating Voltage Range: 2.2 ~ 5.5V (3.3V
Typical)
Operating Power Consumption:
Single channel: 7.5mA @3.3V
Dual channel: 14mA @3.3V
Power down Consumption: < 1uA
The reference crystal oscillator supports
4~25MHz crystal
Dual modulus prescaler: 64/66
No dead-zone PFD
Digital Lock Detect Signal: when loop locked, LD
outputs high level.
Programmable charge pump current: 200uA,
400uA, or 800uA
0.35um CMOS process
Package: TSSOP-16
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Version History
Version Issued time
V1.0 Jun.18, 2006
V1.1 Sep.6, 2006
V1.2 Dec.1, 2008
V2.0 Mar 05, 2009
V2.5 April 26, 2010
Notes
First version created.
Update the test parameter.
Modify the format.
Add packaging process and Soldering temperature profile
Change the maximum voltage to 5.5V, remove 1600uA
chargepump option.
—————————————————————————————————————————————————————————————————————
516 Bld4, National Software Base, Kejizhong 2 Rd, Shenzhen Hi-Tech Park, Shenzhen, China
1 OF 18
Tel: (86-755)8618 5088
Fax: (86-755)8618 5000

1 Page





MCD2926 pdf, ピン配列
MC Devices®
Pin# Pin Name I/O
Description
1
FIN1
I Prescaler1 input. RF signal from VCO.
Power supply voltage input (2.2V-5.5V). Pin2 and Pin15 should be
2,15 VDD
I
connected together externally. Bypass capacitors should be placed
as close as possible to these pins and be connected directly to the
ground plane.
3
CP1
O
Output terminal of channel 1 charge pump. Connected to the loop
filter to drive the voltage control input of the VCO.
4,13 GND
- Terminal of GND. Pin4 and Pin13 should be shorted externally.
5 LD O Lock detection output. It is a CMOS output.
Clock input of the serial interface. Data is clocked in on the rising
6
CLK
I edges of the clock, into the 19-bit shift register in the serial
interface.
7
DATA
I
Serial data input. LSB is entered first and the last two bits are the
control bits.
Load enable input. Data stored in the shift register is loaded into
8 EN I one of the 4 internal latches (depending on the control bits) when
EN is high.
9
BO
O
Buffered output of the crystal oscillator frequency. It is a CMOS
output.
Output terminal of the local oscillator. It is connected to the crystal
if the reference frequency is generated by the local oscillator. When
10 OSCO O the reference clock is provided externally, OSCO should be
connected to VDD to power down the local oscillator for power
saving.
Input terminal of local oscillator. It is connected to the crystal when
11 OSCI I the reference frequency is generated by the local oscillator. It also
can be driven by an external clock.
12
SW
I/O
Switch-over terminal for the time constant of loop filter. It is an
open drain output.
14
CP2
O
Output terminal of channel 2 charge pump. Connected to the loop
filter to drive the voltage control input of the VCO.
16 FIN2 I Prescaler2 input. RF signal from the VCO.
Absolute Maximum Ratings (Note 1)
Parameters
Power supply voltage
Storage Temperature Range
Lead Temp (solder 4 sec)
ESD-Human Body Model
Symbol Min Typical Max
VDD 6.0
TS -55
150
TL 260
VESD
2000
Unit
V
V
—————————————————————————————————————————————————————————————————————
516 Bld4, National Software Base, Kejizhong 2 Rd, Shenzhen Hi-Tech Park, Shenzhen, China
3 OF 18
Tel: (86-755)8618 5088
Fax: (86-755)8618 5000


3Pages


MCD2926 電子部品, 半導体
the locked condition, CP1 or CP2 is primarily in a
tri-state mode with small corrections. The charge
pump current magnitude can be selected as 200uA,
400uA, or 800uA.
1.7 Lock Detector
Phase/frequency detector produces a logic level output at
LD through an internal digital filter. When phase error
MC Devices®
between PFD inputs is less than 2/fosc for 3 consecutive
comparison cycles, the LD output is high to indicate a
phase-locked condition. Under phase-locked condition, if
phase error between PFD inputs is greater than 2/fosc for
one comparison cycle, the LD output drops to low to
indicate a fail-locked condition. The lock detect output is
always low when the PLL is power down. Fosc is crystal
frequency.
start
phase error
<2/fosc
yes
phase error
<2/fosc
yes
phase error
<2/fosc
yes
output=high
(locked state)
phase error
no >2/fosc
output=low
(unlocked state)
no
no
no
yes
—————————————————————————————————————————————————————————————————————
516 Bld4, National Software Base, Kejizhong 2 Rd, Shenzhen Hi-Tech Park, Shenzhen, China
6 OF 18
Tel: (86-755)8618 5088
Fax: (86-755)8618 5000

6 Page



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部品番号部品説明メーカ
MCD2926

18MHz-650MHz Dual Frequency Synthesizer

MC Devices
MC Devices


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