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PDF LTC2312-12 Data sheet ( Hoja de datos )
| Número de pieza | LTC2312-12 | |
| Descripción | 500ksps Serial Sampling ADC | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC2312-12
12-Bit, 500ksps Serial
Sampling ADC in TSOT
Features
n 500ksps Throughput Rate
n No Cycle Latency
n Guaranteed 12-Bit No Missing Codes
n Single 3V or 5V Supply
n Low Noise: 73dB SNR
n Low Power: 8mW at 500ksps and 3V Supply
n Low Drift (20ppm/°C Maximum) 2.048V or 4.096V
Internal Reference
n Sleep Mode with < 1µA Typical Supply Current
n Nap Mode with Quick Wake-Up < 1 Conversion
n Separate 1.8V to 5V Digital I/O Supply
n High Speed SPI-Compatible Serial I/O
n Guaranteed Operation from –40°C to 125°C
n 8-Lead TSOT-23 Package
Applications
n Communication Systems
n High Speed Data Acquisition
n Handheld Terminal Interface
n Medical Imaging
n Uninterrupted Power Supplies
n Battery Operated Systems
n Automotive
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Description
The LTC®2312-12 is a 12-bit, 500ksps, serial sampling
A/D converter that draws only 3mA from a single 3V or
5V supply. The LTC2312-12 contains an integrated low
drift reference and reference buffer providing a low cost,
high performance (20ppm/°C maximum) and space sav-
ing solution. The LTC2312-12 achieves outstanding AC
performance of 72.7dB SINAD and –84dB THD while
sampling at 500ksps. The extremely high sample rate-to-
power ratio makes the LTC2312-12 ideal for compact, low
power, high speed systems. The supply current decreases
at lower sampling rates as the device automatically enters
nap mode after conversions.
The LTC2312-12 has a high speed SPI-compatible serial
interface that supports 1.8V, 2.5V, 3V and 5V logic. The
fast 500ksps throughput with no-cycle latency makes
the LTC2312-12 ideally suited for a wide variety of high
speed applications.
Complete 14-/12-Bit Pin-Compatible SAR ADC Family
500ksps 2.5Msps 4.5Msps
5Msps
14-Bit
LTC2312-14 LTC2313-14 LTC2314-14
12-Bit
LTC2312-12 LTC2313-12
LTC2315-12
Power 3V/5V 9mW/15mW 14mW/25mW 18mW/31mW 19mW/32mW
Typical Application
5V Supply, Internal Reference, 500ksps, 12-Bit Sampling ADC
5V
2.2µF
2.2µF
LTC2312-12
VDD CONV
REF SCK
ANALOG INPUT
0V TO 4.096V
GND
AIN
SDO
OVDD
SERIAL DATA LINK TO
ASIC, PLD, MPU, DSP
OR SHIFT REGISTERS
DIGITAL OUTPUT SUPPLY
1.8V TO 5V
2.2µF
231212 TA01a
16k Point FFT, fS = 500ksps, fIN = 259kHz
0 VDD = 5V
–20
SNR = 73dBFS
SINAD = 72.7dBFS
–40 THD = –84dB
SFDR = 88dB
–60
–80
–100
–120
–140
–160
0
50 100 150 200 250
INPUT FREQUENCY (kHz) 231212 TA01b
For more information www.linear.com/LTC2312-12
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1 page  
LTC2312-12
A DC Timing Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
fSAMPLE(MAX) Maximum Sampling Frequency
(Notes 7, 8)
l 500
fSCK Shift Clock Frequency
(Notes 7, 8)
l 20
tSCK Shift Clock Period
l 50
tTHROUGHPUT Minimum Throughput Time, tACQ + tCONV
l 2000
tCONV
Conversion Time
l 1400
tACQ Acquisition Time
l 600
t1 Minimum CONV Pulse Width
(Note 7), Valid for Nap and Sleep Modes Only l 10
t2 SCK↑ Setup Time After CONV↓
(Note 7), Valid for Nap and Sleep Modes Only l 10
t3 SDO Enable Time After CONV↓
(Notes 7, 8)
l 10
t4 SDO Data Valid Access Time after SCK↓ (Notes 7, 8, 9)
l 11
t5 SCK Low Time
l 10
t6 SCK High Time
l 10
t7
SDO Data Valid Hold Time After SCK↓
(Notes 7, 8, 9)
l1
t8
SDO into Hi-Z State Time After CONV↑
(Notes 7, 8, 10)
l3
10
t9
CONV↑ Quiet Time After 12th SCK↓
(Note 7)
l 15
tWAKE_NAP Power-Up Time from Nap Mode
See Nap Mode Section
50
tWAKE_SLEEP Power-Up Time from Sleep Mode
See Sleep Mode Section
1.1
kHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Note 1. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All voltage values are with respect to ground.
Note 3. When these pin voltages are taken below ground or above VDD
(AIN, REF) or OVDD (SCK, CONV, SDO) they will be clamped by internal
diodes. This product can handle input currents up to 100mA below ground
or above VDD or OVDD without latch-up.
Note 4. VDD = 5V, OVDD = 2.5V, fSMPL = 500kHz, fSCK = 20MHz,
AIN = –1dBFS and internal reference unless otherwise noted.
Note 5. Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6. Typical RMS noise at code transitions.
Note 7. Parameter tested and guaranteed at OVDD = 2.5V. All input signals
are specified with tr = tf = 1ns (10% to 90% of OVDD) and timed from a
voltage level of OVDD/2.
Note 8. All timing specifications given are with a 10pF capacitance load.
Load capacitances greater than this will require a digital buffer.
Note 9. The time required for the output to cross the VOH or VOL voltage.
Note 10. Guaranteed by design, not subject to test.
Note 11. Recommended operating conditions.
For more information www.linear.com/LTC2312-12
231212fa
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5 Page 
Applications Information
LTC2312-12
CONV
SCK
t8
SDO
tCONV-MIN
HI-Z STATE
t2 t6
1
t3
B11
t5
B10
(MSB)
tTHROUGHPUT
tACQ-MIN = 11.5 • tSCK + t2 + t9
tACQ
2 3 4 10
t4 t7
B9 B8
B1
t9
11 12
B0 0
231212 F05
Figure 5. LTC2312-12 Serial Interface Timing Diagram (SCK Low During tCONV)
CONV
SCK
t8
SDO
tCONV-MIN
HI-Z STATE
tACQ-MIN = 11.5 • tSCK + t2 + t9
t2
tACQ
t6
1 2 3 4 10
t3 t5
B11 B10
B9
t4 t7
B8
B1
(MSB)
tTHROUGHPUT
11
B0
t9
12
0
231212 F06
Figure 6. LTC2312-12 Serial Interface Timing Diagram (SCK High During tCONV)
CONV
SCK
SDO
t9
CONVERT
tCONV-MIN
POWER-DOWN
NAP MODE
t8 HI-Z STATE
tCONV > tCONV-MIN
t2
tACQ
t3
B11
(MSB)
B10
231212 F07
Figure 7. LTC2312-12 Nap Mode Power-Down Following Conversion for tCONV > tCONV-MIN
For more information www.linear.com/LTC2312-12
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11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet LTC2312-12.PDF ] | |
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