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PDF IS42VS16160J Data sheet ( Hoja de datos )
| Número de pieza | IS42VS16160J | |
| Descripción | 256Mb Synchronous DRAM | |
| Fabricantes | ISSI | |
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IS42VS83200J / IS42VS16160J / IS42VS32800J
32Mx8, 16Mx16, 8Mx32
256Mb Synchronous DRAM
FEATURES
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access and pre-
charge
• Programmable CAS latency: 2, 3
• Programmable Burst Length: 1, 2, 4, 8, and Full
Page
• Programmable Burst Sequence:
– Sequential and Interleave
• Auto Refresh (CBR)
OPTIONS
• Configurations:
– 32M x 8
– 16M x 16
– 8M x 32
• Power Supply
IS42VSxxx – Vdd/Vddq = 1.8V
• Packages:
x8 –TSOP II (54)
x16 –TSOP II (54)
x32 – TSOP II (86)
• Temperature Range:
Industrial (–40 ºC to 85 ºC)
FEBRUARY 2015
DESCRIPTION
ISSI's 256Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All input and
output signals refer to the rising edge of the clock input.
Both write and read accesses to the SDRAM are burst
oriented. The 256Mb Synchronous DRAM is designed
to minimize power consumption making it ideal for low-
power applications.
KEY TIMING PARAMETERS
Parameter
CLK Cycle Time
CAS Latency = 3
CAS Latency = 2
CLK Frequency
CAS Latency = 3
CAS Latency = 2
Access Time from CLK
CAS Latency = 3
CAS Latency = 2
-75
7.5
9.6
133
104
5.4
8
-10
10
12
100
83
8
10
Unit
ns
ns
Mhz
Mhz
ns
ns
ADDRESSING TABLE
Parameter
Configuration
Refresh Count
Row Addressing
Column Addressing
Bank Addressing
Precharge Addressing
32M x 8
8M x 8 x 4 banks
8K/64ms
A0-A12
A0-A9
BA0, BA1
A10
16M x 16
4M x 16 x 4 banks
8K/64ms
A0-A12
A0-A8
BA0, BA1
A10
8M x 32
2M x 32 x 4 banks
4K/64ms
A0-A11
A0-A8
BA0, BA1
A10
Copyright © 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with-
out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain
the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be
expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated
Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. - www.issi.com 1
Rev. B
2/5/2015
1 page  
IS42VS83200J / IS42VS16160J / IS42VS32800J
PIN CONFIGURATIONS
86 pin TSOP – Type II for x32
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDD
DQM0
WE
CAS
RAS
CS
A11
BA0
BA1
A10
A0
A1
A2
DQM2
VDD
NC
DQ16
VSSQ
DQ17
DQ18
VDDQ
DQ19
DQ20
VSSQ
DQ21
DQ22
VDDQ
DQ23
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
86 VSS
85 DQ15
84 VSSQ
83 DQ14
82 DQ13
81 VDDQ
80 DQ12
79 DQ11
78 VSSQ
77 DQ10
76 DQ9
75 VDDQ
74 DQ8
73 NC
72 VSS
71 DQM1
70 NC
69 NC
68 CLK
67 CKE
66 A9
65 A8
64 A7
63 A6
62 A5
61 A4
60 A3
59 DQM3
58 VSS
57 NC
56 DQ31
55 VDDQ
54 DQ30
53 DQ29
52 VSSQ
51 DQ28
50 DQ27
49 VDDQ
48 DQ26
47 DQ25
46 VSSQ
45 DQ24
44 VSS
PIN DESCRIPTIONS
8M x32
A0–A11
A0–A8
BA0, BA1
DQ0–DQ31
CLK
CKE
CS
RAS
CAS
Pin Name
Row Address Input
Column Address Input
Bank Select Address
Data Input/Output
System Clock Input
Clock Enable
Chip Select
Row Address Strobe Command
Column Address Strobe Command
8M x32
WE
DQM0 - DQM3
VDD
VSS
VDDQ
VSSQ
NC
Pin Name
Write Enable
Data Input/Output Mask
Power
Ground
Power Supply for I/O Pin
Ground for I/O Pin
No Connection
Integrated Silicon Solution, Inc. - www.issi.com 5
Rev. B
2/5/2015
5 Page 
IS42VS83200J / IS42VS16160J / IS42VS32800J
DC ELECTRICAL CHARACTERISTICS VDD = 1.8V
Symbol
Idd1(1)
Idd2p(3)
Idd2ps(3)
Idd2n(2)
Idd2ns
Idd3p(2)
Idd3ps
Idd3n(2)
Idd3ns
Idd4
Idd5
Idd6
Parameter
Operating Current
Precharge Standby Current
(In Power-Down Mode)
Precharge Standby Current
With Clock Stop
(In Power-Down Mode)
Precharge Standby Current
(In Non Power-Down Mode)
Precharge Standby Current
With Clock Stop
(In Non-Power Down Mode)
Active Standby Current
(In Power-Down Mode)
Active Standby Current
With Clock Stop
(In Power-Down Mode)
Active Standby Current
(In Non Power-Down Mode)
Active Standby Current
With Clock Stop
(In Non Power-Down Mode)
Operating Current
Auto-Refresh Current
Self-Refresh Current
Test Condition
One Bank Active, CL = 3, BL = 2,
tCLK = tCLK(min), tRC = tRC(min)
CKE ≤ Vil (max), tCK = 15ns
CS ≥ Vdd - 0.2V
CKE ≤ Vil (max), CLK ≤ Vil (max)
CS ≥ Vdd - 0.2V
CS ≥ Vdd - 0.2V, CKE ≥ Vih (min)
tCK = 15 ns
CS ≥ Vdd - 0.2V, CKE ≥ Vih (min)
All Inputs Stable
CKE ≤ Vil (max), CS ≥ Vdd - 0.2V
tCK = 15 ns, All Banks Active
CKE ≤ Vil (max), CLK ≤ Vil (max)
CS ≥ Vdd - 0.2V, All Banks Active
CS ≥ Vdd - 0.2V, CKE ≥ Vih (min)
tCK = 15 ns, All Banks Active
CS ≥ Vdd - 0.2V, CKE ≥ Vih (min)
All Inputs Stable, All Banks Active
All Banks Active, BL = Full, CL = 3
tCK = tCK(min)
tRC = tRC(min), tCLK = tCLK(min)
CKE ≤ 0.2V
–75 –10 Unit
70 55 mA
3 3 mA
3 3 mA
22 22 mA
10 10 mA
7 7 mA
7 7 mA
30 30 mA
15 15 mA
100 75 mA
110 80 mA
3 3 mA
Notes:
1. Idd (max) is specified at the output open condition.
2. Input signals are changed one time during 30ns.
3. Tested after 500ms delay
Integrated Silicon Solution, Inc. - www.issi.com 11
Rev. B
2/5/2015
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet IS42VS16160J.PDF ] | |
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