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PDF A6274-1 Data sheet ( 特性 )

部品番号 A6274-1
部品説明 Linear Current Regulator and Controller
メーカ Allegro MicroSystems
ロゴ Allegro MicroSystems ロゴ 

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A6274-1 Datasheet, A6274-1 PDF,ピン配置, 機能
A6274, A6274-1
A6284, A6284-1
Linear Current Regulator and Controller
for Automotive LED Arrays
FEATURES AND BENEFITS
• Six LED current sinks rated up to 60 mA (A6274) or
120 mA (A6284)
• Total LED drive current—up to 360 mA or 720 mA
• Wide input voltage range of 5 to 42 V for start/stop, cold-
crank, and load-dump requirements
• Low-dropout voltage—drives two series WLEDs from
7 V input
• Gate driver for external ballast P-MOSFET
• LEDs combined in two groups with separate ENx and
ISETx
• LED current level set by external reference resistors
• Internal or external PWM dimming
• Controlled output drivers slew during PWM for lower
EMI
• Fault detection features: LED string open, LED pin
short-to-ground, single LED short, VOUT short-to-
ground, VIN overvoltage, and thermal protection
• Input supply and temperature-based derating
• Automotive K-temperature range (–40°C to 150°C)
PACKAGES:
20-Pin eTSSOP (LP) with Exposed Thermal Pad
AEC-Q100 qualified
DESCRIPTION
The A6274 and A6284 are programmable linear current
regulator ICs for driving automotive LED arrays. The LED
current is programmed by external resistors. These devices
sink up to 60 mA (A6274) or 120 mA (A6284), from each of
six LED pins, to drive strings of high-brightness LEDs. LED
pins can be paralleled to drive even higher current LED strings.
Current settings are typically accurate to 2%, while typical
matching between LED strings is 0.8%.
LED light output can be adjusted by PWM dimming. The ICs
provide an internal PWM dimming circuit that is programmed
by external resistors for PWM frequency and duty cycle. It
can also accept an external PWM signal. Multiple ICs can be
configured in parallel for larger lighting systems. An internal
FULL (VDR > 3.6 V) option is provided to override the PWM-
dimming ratio for full LED current.
LED current derating with temperature and programmable
VIN levels allows operation over a wide range of operating
conditions.
Continued on next page...
APPLICATIONS
• Automotive rear combination light
• DRL/position
• General automotive lighting
Not to scale
Q1
C2
DIM
FULL
D1
D2
D3 C1
R1
C5
EN1
EN2
R2
R3 R4
FFn
R6
R5
R7
R8
R9
C3
GATE COMP OUT
VIN LED1
LED2
EN1 LED3
EN2 LED4
BIAS A6274-84 LED5
VTH
LED6
FFn GND
DR
PWMIN
ISET1
ISET2
C4
A6274-84-DS, Rev. 1
Figure 1: Typical Application Diagram for “-1” Latching Version

1 Page





A6274-1 pdf, ピン配列
A6274, A6274-1
A6284, A6284-1
Linear Current Regulator and Controller
for Automotive LED Arrays
PINOUT DIAGRAM AND TERMINAL LIST TABLE
ISET1 1
ISET2 2
VTH 3
PWMIN 4
BIAS 5
FFn 6
LED1 7
LED2 8
LED3 9
GND 10
PAD
20 DR
19 EN2
18 EN1
17 VIN
16 GATE
15 COMP
14 OUT
13 LED6
12 LED5
11 LED4
Package LP, 20-Pin eTSSOP Pinout Diagram
Terminal List Table
Number Symbol
Function
Sets LEDx sink current for LED1-3. Connect
1 ISET1 resistor to GND to set current, up to 60 mA
(A6274) or 120 mA (A6284) per channel.
Sets LEDx sink current for LED4-6. Connect
resistor to GND to set current, up to 60 mA
2 ISET2 (A6274) or 120 mA (A6284) per channel.
Connect ISET2 to BIAS if only one resistor
setting is required for LED1-6.
Sets input voltage threshold for current foldback
3 VTH and VOUT threshold for open-LED fault (D, E, F,
and G) disable threshold.
PWM frequency setting. Internal PWM frequency
4
PWMIN
set when connected to GND through a resistor
and uses external PWM when a logic signal is
applied to this pin.
Output of internal bias regulator. Connect a
5 BIAS 1 µF decoupling capacitor near to IC pin. BIAS
pin can deliver up to 7 mA to an external load.
Active-low fault flag. This pin can be used as
an input pin while using “-1” latching version. If
6 FFn pulled low, IC will turn all LEDs off for one-out-
all-out functionality across multiple chips in the
system.
7, 8, 9
LED1-3
Three LED current sinks. Connect the cathode of
each LED string to these pins.
10 GND Ground pin.
11, 12, 13
LED4-6
Three LED current sinks. Connect the cathode of
each LED string to these pins.
14 OUT Connect to drain of series-pass MOSFET.
Connect a 470 nF capacitor across COMP pin
15 COMP and drain node of external PMOS. If PMOS is
not used, connect this pin to VIN.
16
GATE
Gate drive for series-pass MOSFET. If PMOS is
not used, connect this pin to VIN.
Input voltage to IC. Connect to source of series-
17 VIN pass P-channel MOSFET. Connect a decoupling
capacitor close to this pin.
18 EN1 Active-high-enable input for LED1-3.
19 EN2 Active-high-enable input for LED4-6.
Voltage on this pin sets dimming duty cycle
20
DR
when 0 < VDR < 3.6 V. IC operates with 100%
duty cycle in internal and external PWM mode
when VDR > VDRDC(max)
PAD
Thermal pad. Solder to ground plane for better
thermal performance.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3


3Pages


A6274-1 電子部品, 半導体
A6274, A6274-1
A6284, A6284-1
Linear Current Regulator and Controller
for Automotive LED Arrays
ELECTRICAL CHARACTERISTICS (continued): Valid at VIN = 14 V, VENx = 3.3 V; ● indicates specifications across the full operating tempera-
ture range with TJ = –40°C to 150°C; other specifications are at TJ = 25°C, unless noted otherwise. Refer to Figure 1 for typical application circuit.
Characteristics
Symbol
Test Conditions
Min. Typ.
Max.
Unit
PROTECTION
VIN Required to Derate ILED by 10%
VIN Derating Range (VINth(L) to VINth(H))
MOSFET Drain Short Protection Threshold
MOSFET Drain Short Protection Blank Delay
VINth(L)
VINthd
VOUT(SC)
td(OUT,scblnk)
String Short Detect Voltage
VSC(STRING)
LEDx Not-In-Use Voltage
VLEDx(NULL)
LEDx Pin Source Current
ILEDsrc
LED Connected Detect Time
tLEDdet
LEDx Short-to-Ground Detect Voltage
VLED(SC)
Open-LED Disable Voltage
VOLED_dis
Input Overvoltage Threshold
VVINOV
Thermal Monitor Activation Temperature 2
TJM
Thermal Monitor Low-Current Temperature 2
TJL
Overtemperature Shutdown 2
TJF
Overtemperature Hysteresis 2
TJ(HYS)
PWM DIMMING: INTERNAL AND EXTERNAL
VVTH = 1.84 V
ILED drops from 90% to 50% level
Measure across OUT and GND pins
Protection disabled from enable instance
While LED sinks are in regulation; sensed
from VLEDx to VLEDreg, 5 V < VIN < 18 V
Detect during tLEDdet time period
Source current for Not-In-Use Detection
ENx = high and VGATE ≤ (VIN – 3.3) at startup
Measured at OUT pin, VVTH = 2 V
VEN1 = VEN2 = high
TJ where ILED drops to 90% level
TJ where ILED drops to 35% level
Temperature increasing
Recovery = TJF – TJ(HYS)
19 20
6.4
1
1
1.8
0.18
65
0.26
5
10
43
TJF – 21
TJF – 7
175
30
21
2.6
0.34
95
0.16
V
V
V
ms
V
V
μA
ms
V
V
V
°C
°C
°C
°C
Internal-to-External PWM Mode Delay
External-to-Internal PWM Mode Delay
PWM DIMMING INTERNAL
td(PWM,INEX)
td(PWM,EXIN)
VPWMIN < VLOGIC(L)
1 − µs
− 20 − ms
Maximum PWM-Dimming Frequency
Minimum PWM-Dimming Frequency
fPWM(MAX)
fPWM(MIN)
DPWM5 2
7.15 kΩ between PWMIN and GND
71.5 kΩ between PWMIN and GND
DR driven by resistor divider from BIAS,
VBIAS ÷ VDR = 27.78, PWM = 205 Hz to
2 kHz
195
● 4.5
2050
215
5.0
235
5.5
Hz
Hz
%
PWM Duty Cycle
DPWM90
DR driven by resistor divider from BIAS,
VBIAS ÷ VDR = 1.54, PWM = 205 Hz to
2 kHz
87 90
93
%
VDRDC(MAX)
Minimum required voltage on DR for 100%
duty cycle
3.6 −
V
DR Pin Current 1
IDR(SRC)
VDR = 2 V
− − 1 μA
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6

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