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ISL8018 の電気的特性と機能

ISL8018のメーカーはIntersilです、この部品の機能は「8A Low Quiescent Current High Efficiency Synchronous Buck Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL8018
部品説明 8A Low Quiescent Current High Efficiency Synchronous Buck Regulator
メーカ Intersil
ロゴ Intersil ロゴ 




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ISL8018 Datasheet, ISL8018 PDF,ピン配置, 機能
DATASHEET
8A Low Quiescent Current High Efficiency Synchronous
Buck Regulator
ISL8018
The ISL8018 is a high efficiency, monolithic, synchronous
step-down DC/DC converter that can deliver up to 8A continuous
output current from a 2.7V to 5.5V input supply. The output
voltage is adjustable from 0.6V to VIN. With an adjustable current
limit, reverse current protection, prebias start and
over-temperature protection, the ISL8018 offers a highly robust
power solution. It uses current control architecture to deliver fast
transient response and excellent loop stability.
The ISL8018 integrates a pair of low ON-resistance P-channel
and N-channel internal MOSFETs to maximize efficiency and
minimize external component count. 100% duty-cycle operation
allows less than 250mV dropout at 8A output current. Adjustable
frequency and synchronization allow the ISL8018 to be used in
applications requiring low noise.
The ISL8018 can be configured for discontinuous or forced
continuous operation at light load. Forced continuous operation
reduces noise and RF interference while discontinuous mode
provides high efficiency by reducing switching losses at light loads.
The ISL8018 is offered in a space saving 20 Ld 3x4 QFN lead free
package with exposed pad lead frames for excellent thermal
performance. The complete converter occupies less than
96.8mm2 area.
See Ordering Information on page 2 for more detail.
Related Literature
UG052 “ISL8018DEMO1Z Demonstration Board User Guide”
UG053 “ISL8018EVAL3Z Evaluation Board User Guide”
Features
• High efficiency synchronous buck regulator with up to 97%
efficiency
• ±10% output voltage margining
• Adjustable current limit
• Start-up with prebiased output
• Internal soft-start - 1ms or adjustable, internal/external
compensation
• Soft-stop output discharge during disabled
• Adjustable frequency from 500kHz to 4MHz - default at 1MHz
• External synchronization up to 4MHz - master to slave phase
shifting capability
• Peak current limiting, hiccup mode short-circuit protection and
over-temperature protection
Applications
• DC/DC POL modules
• µC/µP, FPGA and DSP power
• Plug-in DC/DC modules for routers and switchers
• Portable instruments
• Test and measurement systems
• Li-ion battery powered devices
September 30, 2015
FN7889.0
100
95
3.3VOUT PFM
90
3.3VOUT PWM
85
80
75
70
01 2 3 4 5 6
IOUT (A)
FIGURE 1. EFFICIENCY T = +25°C VIN = 5V
7
8
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL8018 pdf, ピン配列
Pin Descriptions
PIN
1, 19, 20
2, 3, 4
5, 6, 7
8
SYMBOL
PGND
PHASE
VIN
PG
9 SYNCOUT
10 SYNCIN
11
12
13
14
15
16, 17
EN
FS
VSET
ISET
SS
COMP, VFB
18 SGND
EPAD
ISL8018
DESCRIPTION
Power ground.
Switching node connection. Connect to one terminal of the inductor.
Input supply voltage. Connect two 22µF ceramic capacitors to power ground.
Power-good is an open-drain output. Use 10kΩ to 100kΩ pull-up resistor connected between VIN and
PG. At power-up or EN HI, PG rising edge is delayed by 1ms from the output reaching regulation.
This pin outputs a 250µA current source that is turned on at the rising edge of the internal clock or
SYNCIN. When SYNCOUT voltage reaches 0.8V, a reset circuit will activate and discharge SYNCOUT to
0V. SYNCOUT is held at 0V in PFM light load to reduce quiescent current.
Mode selection pin. Connect to logic high or input voltage VIN for PWM mode. Connect to logic low or
ground for PFM mode. Connect to an external function generator for synchronization with the positive
edge trigger. There is an internal 1MΩ pull-down resistor to prevent an undefined logic state if SYNCIN
is floating.
Regulator enable pin. Enables the output when driven to high. Shuts down the chip and discharges the
output capacitor when driven to low.
This pin sets the oscillator switching frequency, using a resistor, RFS, from the FS pin to GND. The
frequency of operation may be programmed between 500kHz to 4MHz. The default frequency is 1MHz
and configured for internal compensation if FS is connected to VIN.
VSET is the output margining setting of the regulators. Connect to SGND for -10%, keep it floating for
no margining and connect to VIN for +10%.
ISET is the peak output current limit and skip current limit setting of the regulators. Connect to SGND
for 3A, to VIN for 5A and keep it floating for 8A.
SS is used to adjust the soft-start time. Set to SGND for internal 1ms rise time. Connect a capacitor
from SS to SGND to adjust the soft-start time. Do not use more than 33nF per IC.
The feedback network of the regulator, VFB, is the negative input to the transconductance error
amplifier. COMP is the output of the amplifier if the FS resistor is used. If internal compensation is used
(FS = VIN), the comp pin should be tied to SGND. The output voltage is set by an external resistor divider
connected to VFB. With a properly selected divider, the output voltage can be set to any voltage
between VIN and the 0.6V reference. While internal compensation offers a solution for many typical
applications, an external compensation network may offer improved performance for some designs.
In addition to regulation, VFB is also used to determine the state of PG.
Signal ground.
The exposed pad must be connected to the SGND pin for proper electrical performance. Place as many
vias as possible under the pad connecting to the system GND plane for optimal thermal performance.
Submit Document Feedback
3
FN7889.0
September 30, 2015


3Pages


ISL8018 電子部品, 半導体
ISL8018
Absolute Maximum Ratings (Reference to GND)
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.8V (DC) or 7V (20ms)
EN, FS, ISET, PG, SYNCOUT, SYNCIN VFB, VSET . . . . . . -0.3V to VIN + 0.3V
PHASE . . . . . . . . . . . . -1.5V (100ns)/-0.3V (DC) to 6.5V (DC) or 7V (20ms)
COMP, SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
ESD Rating
Human Body Model (Tested per JESD22-A114) . . . . . . . . . . . . . . . . . 3kV
Machine Model (Tested per JESD22-A115). . . . . . . . . . . . . . . . . . . . 300V
Charged Device Model (Tested per JESD22-C101E). . . . . . . . . . . . . .1.5V
Latch-up (Tested per JESD-78A; Class 2, Level A) . . . . . .100mA at +85°C
Thermal Information
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
3x4 QFN Package (Notes 4, 5) . . . . . . . . . .
42
5
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions
VIN Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Load Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0A to 8A
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. JC, “case temperature” location is at the center of the exposed metal pad on the package underside.
Analog Specifications All parameter limits are established across the recommended operating conditions and are measured at the
following conditions: TA = -40°C to +85°C, VIN = 3.6V, EN = VIN, unless otherwise noted. Typical values are at TA = +25°C. Boldface limits apply across
the operating temperature range, -40°C to +85°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 6)
MAX
TYP (Note 6) UNIT
INPUT SUPPLY
VIN Undervoltage Lockout Threshold
VUVLO Rising, no load
Falling, no load
2.5 2.7
V
2.2 2.4
V
Quiescent Supply Current
IVIN SYNCIN = GND, no load at the output
SYNCIN = GND, no load at the output and no
switches switching
70 µA
70 95 µA
SYNCIN = VIN, fSW = 1MHz, no load at the
output
8 15 mA
Shutdown Supply Current
OUTPUT REGULATION
ISD SYNCIN = GND, VIN = 5.5V, EN = low
5 9.5 µA
Reference Voltage
Output Voltage Margining
VFB Bias Current
Fixed Output VFB Bias Current
Line Regulation
Soft-Start Ramp Time Cycle
VREF
VVFB
IVFB
IVFB
VSET = VIN
VSET = FLOAT
VSET = SGND
VSET = VIN, percent of output changed
VSET = SGND, percent of output changed
VFB = 0.75V
VSET = FLOAT, VFB = 10% above output
VIN = VO + 0.5V to 5.5V (minimal 2.7V)
SS = SGND
0.651
0.594
0.531
9.5
-10.5
0.660
0.600
0.540
10
-10
0.1
6
0.2
1
0.669
0.606
0.549
10.5
-9.5
V
V
V
%
%
µA
µA
%/V
ms
Soft-Start Charging Current
OVERCURRENT PROTECTION
ISS VSS = 0.1V
1.4 1.8 2.2 µA
Current Limit Blanking Time
tOCON
17 Clock
pulses
Overcurrent and Auto Restart Period
tOCOFF
8 SS cycle
Submit Document Feedback
6
FN7889.0
September 30, 2015

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