|
|
PDF PI6C2409-1H Data sheet ( Hoja de datos )
| Número de pieza | PI6C2409-1H | |
| Descripción | Zero-Delay Clock Buffer | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PI6C2409-1H (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
|
No Preview Available !
Features
• Maximum rated frequency: 133 MHz
• Low cycle-to-cycle jitter
• Input to output delay, less than 200ps
• Internal feedback allows outputs to be synchronized to the
clock input
• Spread spectrum compatible
• Operates at 3.3V VDD
• Space-saving Package: (Pb-free & Green available)
- 16-Pin TSSOP (L)
- 16-Pin SOIC (W)
PI6C2409-1H
Zero-Delay Clock Buffer
Description
The PI6C2409-1H is a PLLbased, zero-delay buffer, with the ability
to distribute nine outputs of up to 133 MHz at 3.3V.
All the outputs are distributed from a single clock input CLKIN and
output OUT0 performs zero delay by connecting a feedback to PLL.
PI6C2409-1H has two banks of four outputs that can be controlled by
the selection inputs, SEL1 & SEL2. It also has a power sparing feature:
when input SEL1 is 0 and SEL2 is 1, PLL is turned off and all
outputs are referenced from CLKIN. PI6C2409-1H is available in
high drive and industrial environment versions.
An internal feedback on OUT0 is used to synchronize the
outputs to the input; the relationship between loading of this signal
and the outputs determines the input-output delay.
PI6C2409-1H are characterized for both commercial and
industrial operation
Block Diagram
CLKIN
PLL MUX
SEL1
SEL2
Decode
Logic
PI6C2409-1H
Pin Configuration
OUT0
OUTA1
OUTA2
OUTA3
OUTA4
OUTB1
OUTB2
OUTB3
OUTB4
CLKIN
OUTA1
OUTA2
VDD
GND
OUTB1
OUTB2
SEL2
1 16
2 15
3 14
4 16-Pin 13
5 W, L 12
6 11
7 10
89
OUT0
OUTA4
OUTA3
VDD
GND
OUTB4
OUTB3
SEL1
All trademarks are property of their respective owners.
15-0174
1
www.pericom.com 12/02/15
1 page  
PI6C2409-1H
Zero-Delay Clock Buffer
AC Electrical Characteristics for Commercial Temperature Devices
Parameters Description
Test Conditions
Min. Typ. Max. Units
FO Output Frequency
30pF load
10pF load
10.0
100
133
MHz
tDC
tR
tF
tSK(O)
Duty Cycle(1)
Duty Cycle(1)
Measured at VDD/2,
FO = 66.67 MHz
Measured at VDD/2V,
FO <50 MHz
40.0 60.0
50 %
45.0 55.0
Rise Time(1)
Fall Time(1)
Measured between 0.8V and 2.0V
1.5
1.5
ns
Output to Output Skew(1)
All outputs equally loaded
250
t0
Delay, CLKIN Rising Edge
to OUT0 Rising Edge(1)
Measured at VDD/2
0
±350
ps
tSK(D)
Device-to-Device Skew(1)
Measured at VDD/2 on OUT0 pins
of devices
0 700
tSLEW
Output Slew Rate(1)
Measured between 0.8V & 2.0V
on –1H device using Test Crt #2
1
V/ns
tJIT
Cycle-to-Cycle Jitter(1)
Measured at 66.67 MHz,
loaded 30pF load
200 ps
tLOCK
PLL Lock Time(1)
Stable power supply, valid clocks
presented on CLKIN pin
1.0 ms
Note:
1. See Switching Waveforms on page 6.
All trademarks are property of their respective owners.
15-0174
5
www.pericom.com
11/21/ 2015
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PI6C2409-1H.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PI6C2409-1H | Zero-Delay Clock Buffer | Pericom Semiconductor |
| PI6C2409-1HL | Zero-Delay Clock Buffer |  Pericom Semiconductor Corporation |
| PI6C2409-1HW | Zero-Delay Clock Buffer | Pericom Semiconductor Corporation |
| PI6C2409-1HWI | Zero-Delay Clock Buffer | Pericom Semiconductor Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |