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Número de pieza | UT54ACS153 | |
Descripción | Dual 4 to 1 Multiplexers | |
Fabricantes | Aeroflex Circuit Technology | |
Logotipo | ||
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UT54ACS153/UT54ACTS153
Dual 4 to 1 Multiplexers
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
1.2μ CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 16-pin DIP
- 16-lead flatpack
UT54ACS153 - SMD 5962-96550
UT54ACTS153 - SMD 5962-96551
DESCRIPTION
The UT54ACS153 and the UT54ACTS153 are dual four to one
line selectors/multiplexers. Common inputs A and B select a
value from one of four sources for each section and routes the
value from each section to their respective outputs. Separate
strobe inputs, G are provided for each of the two four-line sec-
tions.
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
SELECT
INPUTS
DATA INPUTS
OUTPUT OUTPUT
CONTROL
B A C0 C1 C2 C3
G
Y
XX X X X X
H
L
LL
L
X
X
X
L
L
LL H X X X
L
H
LH X L X X
L
L
LH X H X X
L
H
HL X X L X
L
L
HL X X H X
L
H
HH X X X L
L
L
HH X X X H
L
H
PINOUTS
16-Pin DIP
Top View
1G 1 16 VDD
B 2 15 2G
1C3 3 14 A
1C2 4 13 2C3
1C1 5 12 2C2
1C0 6 11 2C1
1Y 7 10 2C0
VSS 8 9 2Y
16-Lead Flatpack
Top View
1G 1 16 VDD
B 2 15 2G
1C3 3 14 A
1C2 4 13 2C3
1C1 5 12 2C2
1C0 6 11 2C1
1Y 7 10 2C0
VSS 8 9 2Y
LOGIC SYMBOL
A (14)
(2)
B
0
G
0--
3
1
(1)
1G
(6)
1C0
(5)
1C1
(4)
1C2
(3)
1C3
(15)
2G
(10)
2C0
(11)
2C1
2C2 (12)
(13)
2C3
EN MUX
0
1
2
3
(7)
1Y
(9)
2Y
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
1
1 page Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, -
50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density ≤ 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765
pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose ≤ 1E6 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
5
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet UT54ACS153.PDF ] |
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