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UT54ACS245 の電気的特性と機能

UT54ACS245のメーカーはAeroflex Circuit Technologyです、この部品の機能は「Octal Bus Transceiver」です。


製品の詳細 ( Datasheet PDF )

部品番号 UT54ACS245
部品説明 Octal Bus Transceiver
メーカ Aeroflex Circuit Technology
ロゴ Aeroflex Circuit Technology ロゴ 




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UT54ACS245 Datasheet, UT54ACS245 PDF,ピン配置, 機能
Standard Products
UT54ACS245/UT54ACTS245
Octal Bus Transceiver with Three-State Outputs
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
‰ Three-state outputs drive bus line directly
‰ 1.2μ CMOS
- Latchup immune
‰ High speed
‰ Low power consumption
‰ Single 5 volt supply
‰ Available QML Q or V processes
‰ Flexible package
- 20-pin DIP
- 20-lead flatpack
‰ UT54ACS245 - SMD 5962-96572
‰ UT54ACTS245 - SMD 5962-96573
DESCRIPTION
The UT54ACS245 and the UT54ACTS245 are non-inverting
octal bus transceivers designed for asynchronous two-way com-
munication between data buses. The control function imple-
mentation minimizes external timing requirements.
The devices allow data transmission from the A bus to the B bus
or from the B bus to the A bus depending upon the logic level
at the direction control (DIR) input. The enable input (G) dis-
ables the device so that the buses are effectively isolated.
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
ENABLE DIRECTION
G CONTROL DIR
OPERATION
LL
B Data To A Bus
LH
A Data To B Bus
HX
Isolation
PINOUTS
DIR
A1
A2
A3
A4
A5
A6
A7
A8
VSS
20-Pin DIP
Top View
DIR 1 20 VDD
A1 2 19 G
A2 3 18 B1
A3 4 17 B2
A4 5 16 B3
A5 6 15 B4
A6 7 14 B5
A7 8 13 B6
A8 9 12 B7
VSS 10 11 B8
20-Lead Flatpack
Top View
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VDD
G
B1
B2
B3
B4
B5
B6
B7
B8
LOGIC SYMBOL
(19)
G
(1)
DIR
(2)
A1
(3)
A2
(4)
A3
(5)
A4
(6)
A5
(7)
A6
(8)
A7
A8 (9)
G3
3 EN1 (BA)
3 EN2 (AB)
1
2
(18)
B1
(17)
B2
(16)
B3
(15)
B4
(14)
B5
(13)
(12) B6
B7
(11)
B8
Note:
1 1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.

1 Page





UT54ACS245 pdf, ピン配列
OPERATIONAL ENVIRONMENT1
PARAMETER
Total Dose
SEU Threshold 2
SEL Threshold
Neutron Fluence
LIMIT
1.0E6
80
120
1.0E14
UNITS
rads(Si)
MeV-cm2/mg
MeV-cm2/mg
n/cm2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
LIMIT
UNITS
VDD Supply voltage
-0.3 to 7.0
V
VI/O
TSTG
TJ
TLS
ΘJC
II
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
-.3 to VDD +.3
-65 to +150
+175
+300
20
±10
V
°C
°C
°C
°C/W
mA
PD Maximum power dissipation
1W
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at
these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VDD
VIN
TC
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
4.5 to 5.5
0 to VDD
-55 to + 125
UNITS
V
V
°C
3


3Pages


UT54ACS245 電子部品, 半導体
AC ELECTRICAL CHARACTERISTICS 2
(VDD = 5.0V ±10%; VSS = 0V 6, -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
PARAMETER
MINIMUM
MAXIMUM
UNIT
tPLH Data to bus
tPHL Data to bus
tPZL G low to bus active
tPZH G low to bus active
tPLZ G high to bus three-state
tPHZ G high to bus three-state
1 11 ns
1 15 ns
2 12 ns
2 12 ns
2 12 ns
2 12 ns
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for radiation dose 1E6 rads(Si)
6

6 Page



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