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UT699EのメーカーはAeroflex Circuit Technologyです、この部品の機能は「32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor」です。 |
部品番号 | UT699E |
| |
部品説明 | 32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor | ||
メーカ | Aeroflex Circuit Technology | ||
ロゴ | |||
このページの下部にプレビューとUT699Eダウンロード(pdfファイル)リンクがあります。 Total 30 pages
Standard Products
UT699E 32-bit Fault-Tolerant
SPARCTM V8/LEON 3FT Processor
Datasheet
March 2015
www.aeroflex.com/LEON
FEATURES
Backward compatible with the UT699
Supports up to 100MHz clock rate
Separate instruction and data cache architecture
High-performance pipelined IEEE-754 FPU
Enhanced pipeline with 1.2 DMIPS / MHz performance
Implemented on 130nm CMOS technology
Internally configured clock network
Power saving 1.2V core power supply
3.3V I/O compatibility
On-board programmable timers and interrupt controllers
SEU hardened-by-design flip-flops and memory cells
10/100 Base-T Ethernet port for VxWorks development
Integrated PCI 2.2 compatible core
Four integrated multi-protocol SpaceWire nodes that
support the RMAP protocol
Two CAN 2.0 compliant bus interfaces
Multifunctional memory controller
-55oC to +105oC temperature range
Operational environment:
- Intrinsic total-dose: 100 krad(Si)
- SEL Immune ≤ 110 MeV-cm2/mg
Packaging options:
- 484-pin Ceramic Land Grid, Column Grid and Ball
Grid Array packages
Standard Microcircuit Drawing 5962-13237
- QML Q, Q+, and V (Pending)
Applications
- Nuclear power plant controls
- Critical transportation systems
- High-altitude avionics
- Medical electronics
- X-Ray cargo scanning
- Spaceborne computer
- System controller boards
- Avionics processing boards
INTRODUCTION
The UT699E is an enhanced version of the UT699 featuring a
seven stage pipelined monolithic, high-performance, fault-
tolerant SPARCTM V8/LEON 3FT Processor. L1 cache has
been increased to 16kB for both instruction and data caches.
Performance is increased to 1.2 DMIPS / MHz. RMAP protocol
is supported for all four SpaceWire ports. Other enhancements
include cache snooping. The UT699E provides a 32-bit master/
target PCI interface, including a 16 bit user I/O interface for
off-chip peripherals. A compliant 2.0 AMBA bus interface
integrates the on-chip LEON 3FT, SpaceWire, Ethernet,
memory controller, cPCI, CAN bus, and programmable
interrupt peripherals.
The UT699E is SPARC V8 compliant; therefore, developers
may use industry standard compilers, kernels, and development
tools. A full software development suite is available including
a C/C++ cross-compiler system based on GCC and the Newlib
embedded C-library. Software developed for the UT699 will be
100% compatible with the UT699E.
BCC includes a small run-time kernel with interrupt support
and Pthreads library. For multi-threaded applications, a
SPARCTM compliant port of the eCos real-time kernel, RTEMS
4.10, and VxWorks 6.x is supported.
36-00-00-001
Ver. 1.5.0
1 Aeroflex Microelectronics Solutions - HiRel
1 Page 2.0 Pin Identification and Description
Pin Function
Description
I CMOS input
IS CMOS input Schmitt
O CMOS output
I/O CMOS bi-direct
OD CMOS open drain
PCI-I
PCI input
PCI-O
PCI output
PCI-I/O
PCI bi-direct
PCI-3
PCI three-state
2.1. System Signals
Pin Name
SYSCLK
RESET
ERROR1
WDOG1
Function
I
IS
OD
Pin
Number
484 CLGA
Y20
L19
K19
OD J19
Reset
Value
Description
-- Main system clock
-- System reset
-- Processor error mode indicator. This is an active low
output.
-- Watchdog indicator. This is an active low output.
Notes:
1. This pin is actively driven low and must be tied to VDD through a pull-up resistor.
2.2 Address Bus
Pin Name
ADDR[0]
ADDR[1]
ADDR[2]
ADDR[3]
ADDR[4]
ADDR[5]
ADDR[6]
ADDR[7]
ADDR[8]
Direction
O
O
O
O
O
O
O
O
O
Pin
Number
484 CLGA
W5
Y5
W6
AA5
Y6
AB5
W7
AA6
Y7
Reset
Value
Description
low Bit 0 of the address bus
low Bit 1 of the address bus
low Bit 2 of the address bus
low Bit 3 of the address bus
low Bit 4 of the address bus
low Bit 5 of the address bus
low Bit 6 of the address bus
low Bit 7 of the address bus
low Bit 8 of the address bus
36-00-00-001
Ver. 1.5.0
3 Aeroflex Microelectronics Solutions - HiRel
3Pages 2.4 Check Bits
Pin Name
CB[0]
CB[1]
CB[2]
CB[3]
CB[4]
CB[5]
CB[6]
CB[7]
Direction
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Pin
Number
484 CLGA
V19
AA21
Y21
W19
Y22
W20
W22
W21
Reset
Value
Description
high-z
high-z
high-z
high-z
high-z
high-z
high-z
high-z
Bit 0 of EDAC checkbits
Bit 1 of EDAC checkbits
Bit 2 of EDAC checkbits
Bit 3 of EDAC checkbits
Bit 4 of EDAC checkbits
Bit 5 of EDAC checkbits
Bit 6 of EDAC checkbits
Bit 7 of EDAC checkbits
2.5 Memory Control Signals
Pin Name
WRITE
OE
IOS
ROMS[0]
ROMS[1]
RWE[0]
RWE[1]
RWE[2]
RWE[3]
RAMOE[0]
RAMOE[1]
RAMOE[2]
RAMOE[3]
RAMOE[4]
RAMS[0]
Direction
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Pin
Number
484 CLGA
V21
U19
T20
V22
U20
U22
T19
T22
T21
V20
R21
R20
R22
R19
P22
Reset
Value
Description
high PROM and I/O write enable strobe
high PROM and I/O output enable
high I/O area chip select
high PROM chip select
high PROM chip select
high SRAM write enable strobe
high SRAM write enable strobe
high SRAM write enable strobe
high SRAM write enable strobe
high SRAM output enable
high SRAM output enable
high SRAM output enable
high SRAM output enable
high SRAM output enable
high SRAM chip select
36-00-00-001
Ver. 1.5.0
6 Aeroflex Microelectronics Solutions - HiRel
6 Page | |||
ページ | 合計 : 30 ページ | ||
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PDF ダウンロード | [ UT699E データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
UT699 | 32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor | Aeroflex Circuit Technology |
UT699E | 32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor | Aeroflex Circuit Technology |