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PDF HV5308PJ-B-G Data sheet ( Hoja de datos )
| Número de pieza | HV5308PJ-B-G | |
| Descripción | 32-Channel Serial to Parallel Converter | |
| Fabricantes | Supertex | |
| Logotipo |  |
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Supertex inc.
HV5308B
32-Channel Serial to Parallel Converter
With High Voltage Push-Pull Outputs
Features
►►Processed with HVCMOS® technology
►►Low power level shifting
►►Source/sink current minimum 20mA
►►Shift register speed 8.0MHz
►►Latched data outputs
►►CMOS compatible inputs
►►Forward and reverse shifting options
►►Diode to VPP allows efficient power recovery
General Description
The HV5308B is a low voltage serial to high voltage parallel
converter with push-pull outputs. This device has been designed
for use as a driver for AC-electroluminescent displays. It can also
be used in any application requiring multiple output high voltage
current sourcing and sinking capabilities, such as driving plasma
panels, vacuum fluorescent, or large matrix LCD displays.
The HV5308B consists of a 32-bit shift register, 32 latches, and
control logic to enable outputs. Q1 is connected to the first stage
of the shift register through the Output Enable logic. Data is shifted
through the shift register on the low to high transition of the clock.
When viewed from the top of the package, the HV5308B shifts
in the clockwise direction. A data output buffer is provided for
cascading devices. This output reflects the current status of the
last bit of the shift register (32). Operation of the shift register is
not affected by the LE (latch enable) or the OE (output enable)
inputs. Transfer of data from the shift register to the latch occurs
when the LE input is high. The data in the latch is retained when
LE is low.
Typical Application Circuit
VDD
DATA
INPUT
CLK Low Voltage
Micro
LE
Processor
OE
Shift Register
Latches
Output Contr.
VPP
High Voltage
Level
Translators
&
Push-Pull
Output
Buffers
DATA
OUT
Supertex HV5308B
Data Input for cascading the next HV5308B
HVOUT1
HVOUT32
Columns
Display
Panel
Row
Driver
Doc.# DSFP-HV5308B
B072213
Supertex inc.
www.supertex.com
1 page  
Input and Output Equivalent Circuits
VDD
VDD
HV5308B
VPP
DATA
INPUT
DATA OUT
HVOUT
GND
Logic Inputs
GND
Logic Data Output
GND
High Voltage Outputs
Functional Block Diagram
VPP
OE
LE
DATA
INPUT
CLK
32 bit
Static
Register
32 bit
Latches
DATA
OUT
Function Tables
DATA IN
CLK*
H
L
X No
Note:
* = LOW - to - HIGH transition
H = High
L = Low
X = Don’t Care
DATA OUT
H
L
No change
DATA IN
X
X
H
L
LE
X
L
H
H
HVOUT1
HVOUT2
•
•
•
28 Additional
Outputs
•
•
•
HVOUT31
HVOUT32
OE HV OUT
L All HVOUT = LOW
H Previous latched data
HH
HL
Doc.# DSFP-HV5308B
B072213
Supertex inc.
5 www.supertex.com
5 Page 
44-Lead PQFP Package Outline (PG)
10.00x10.00mm body, 2.35mm height (max), 0.80mm pitch
D
D1
HV5308B
Note 1
(Index Area
D1/4 x E1/4)
44
1
be
Top View
A A2
A1
Side View
E1 E
View B
Seating
Plane
θ1
L2
Gauge
Plane
L
L1
θ Seating
Plane
View B
Note:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
Symbol
A A1 A2 b D D1 E E1 e
MIN 1.95* 0.00 1.95 0.30 13.65*
Dimension
(mm)
NOM
-
- 2.00 - 13.90
MAX 2.35 0.25 2.10 0.45 14.15*
JEDEC Registration MO-112, Variation AA-2, Issue B, Sep.1995.
* This dimension is not specified in the JEDEC drawing.
Drawings not to scale.
Supertex Doc. #: DSPD-44PQFPPG, Version C041309.
9.80*
10.00
10.20*
13.65*
13.90
14.15*
9.80*
10.00
10.20*
0.80
BSC
L
0.73
0.88
1.03
L1 L2
1.95 0.25
REF BSC
θ
0O
3.5O
7O
Doc.# DSFP-HV5308B
B072213
Supertex inc.
11 www.supertex.com
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet HV5308PJ-B-G.PDF ] | |
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