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PDF A1233 Data sheet ( Hoja de datos )
| Número de pieza | A1233 | |
| Descripción | Dual-Channel Hall-Effect Direction Detection Sensor IC | |
| Fabricantes | Allegro | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de A1233 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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A1233
Dual-Channel Hall-Effect Direction Detection Sensor IC
Features and Benefits
▪ AEC-Q100 automotive qualified
▪ Precisely aligned dual Hall elements
▪ Tightly matched magnetic switchpoints
▪ Speed and direction outputs
▪ Individual Hall element outputs (L package)
▪ Output short-circuit protection
▪ Operation from an unregulated power supply
▪ Wide operating temperature range
▪ Wide operating voltage range
▪ Integrated EMC-ESD protection
▪ Superior temperature stability and industry-leading
jitter performance through use of advanced chopper
stabilization topology
Packages
4-pin SIP (suffix K)
8-pin SOIC (suffix L)
Not to scale
Description
The A1233 is a dual-channel Hall-effect sensor IC ideal for
use in speed and direction sensing applications incorporating
encoder ring-magnet targets.TheA1233 provides various output
signals that indicate speed and direction of target rotation. The
Hall elements are both photolithographically aligned to better
than 1 μm. Maintaining accurate displacement between the two
active Hall elements eliminates the major manufacturing hurdle
encountered in fine-pitch detection applications. The A1233 is
a highly sensitive, temperature-stable magnetic device ideal for
use in harsh automotive and industrial environments.
The Hall elements of the A1233 are spaced 1.63 mm apart,
which provides excellent speed and direction information
for small-geometry targets. Extremely low-drift amplifiers
guarantee symmetry between the switches to maintain signal
quadrature. An on-chip regulator allows the use of this device
over a wide operating voltage range of 3.5 to 24 V.
End-of-line trimming of the Hall element switchpoints provides
tight matching capability. The Allegro™ patented, high-
frequency chopper stabilization technique cancels offsets in
each channel, providing stable operation over the full specified
temperature and voltage ranges.
Continued on the next page…
VCC
Channel A
Hall
Element
E1
Functional Block Diagram
Programmable
Trim
LDO Regulator
2 Bit
Amp
Low-
Pass
Filter
Direction
Logic
L Package Only
Output
Drive
Output
Drive
OUTA
DIR
Channel B
Hall
Element
E2
Amp
Low-
Pass
Filter
2 Bit
Output
Drive
L Package Only
Output
Drive
SPD
OUTB
A1233-DS, Rev. 1
GND
1 page  
A1233
Dual-Channel Hall-Effect Direction Detection Sensor IC
Thermal Characteristics: may require derating at maximum conditions; see application information
Characteristic
Symbol
Test Conditions*
Package K, single-sided PCB with copper limited to solder pads
Package Thermal Resistance
RθJA
Package L, single-sided PCB with copper limited to solder pads
Package L, 4-layer PCB based on JEDEC standard
*Additional thermal information available on Allegro website.
Value
177
140
80
Unit
ºC/W
ºC/W
ºC/W
Power Derating Curve
27
26
25
24
23
22 Package L
21
20
(RθJA = 80 ºC/W)
19 Package L
18
17
(RθJA = 140 ºC/W)
16
15
14
Package K
(RθJA = 177 ºC/W)
13
12
11
10
9
8
7
6
5
4
3
2
VCC(max)
VCC(min)
20 40 60 80 100 120 140 160 180
Temperature (ºC)
Power Dissipation versus Ambient Temperature
2000
1800
1600
1400
Package L
(RθJA = 80 ºC/W)
1200
1000
800
600
Package L
(RθJA = 147 ºC/W)
400
Package K
200
(RθJA = 177 ºC/W)
0
20 40 60 80 100 120 140 160 180
Temperature (°C)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
5 Page 
A1233
Dual-Channel Hall-Effect Direction Detection Sensor IC
Package L, 8-Pin SOIC
4.90 ±0.10
1.63 E
8
1.63 E
E1
A
1
E 1.09
2
1.95 E
E2
3.90 ±0.10
6.00 ±0.20
D
8X
0.10 C
0.51
0.31
1.27 BSC
Branded Face
SEATING
PLANE
C
1.75 MAX
0.25
0.10
For Reference Only; not for tooling use (reference MS-012AA)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Branding scale and appearance at supplier discretion
C Reference land pattern layout (reference IPC7351
SOIC127P600X175-8M); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances
D Active Area Depth 0.40 NOM
E Hall elements (E1 and E2); not to scale
8°
0°
0.25
0.17
1.04 REF
1.27
0.40
0.25 BSC
SEATING PLANE
GAUGE PLANE
0.65 8
1.75
1.27
5.60
12
C PCB Layout Reference View
NNNNNNN
YYWW
LLLLL
1
B Standard Branding Reference View
N = Device part number
= Supplier emblem
Y = Last two digits of year of manufacture
W = Week of manufacture
L = Lot number
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet A1233.PDF ] | |
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