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PDF PI6C49S1506 Data sheet ( Hoja de datos )
| Número de pieza | PI6C49S1506 | |
| Descripción | High Performance Differential Fanout Buffer | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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PI6C49S1506
High Performance Differential Fanout Buffer
Features
ÎÎ6 differential outputs with 2 banks
ÎÎUser configurable output signaling standard for each bank:
LVDS or LVPECL or HCSL
ÎÎUp to 1.5GHz output frequency for differential outputs
ÎÎUltra low additive phase jitter: < 0.03 ps (typ) (differential
156.25MHz, 12KHz to 20MHz integration range)
ÎÎSelectable reference inputs support either single-ended
or differential or Xtal
ÎÎLow skew between outputs within banks (<40ps)
ÎÎLow delay from input to output (Tpd typ. 1.5ns)
ÎÎSeparate Input output supply voltage for level shifting
ÎÎ2.5V / 3.3V power supply
ÎÎIndustrial temperature support
ÎÎTQFP-32 package
Description
The PI6C49S1506 is a high performance fanout buffer device-
which supports up to 1.5GHz frequency. It also integrates a
unique feature with user configurable output signaling stan-
dards on per bank basis which provide great flexibilities to
users. The device also uses Pericom's proprietary input detection
technique to make sure illegal input conditions will be detected
and reflected by output states. This device is ideal for systems
that need to distribute low jitter clock signals to multiple desti-
nations.
Applications
ÎÎNetworking systems including switches and Routers
ÎÎHigh frequency backplane based computing and telecom
platforms
Block Diagram
Pin Configuration (32-Pin TQFP)
XT
XTN
CLK0
nCLK0
CLK1
nCLK1
OSC
CLK_SEL[1:0]
Iref
OPMODEA[1:0]
QA[0:2]
3
OPMODEB[1:0]
QB[0:2]
3
VDDO
nQA1
QA1
VEE
nQA0
QA0
CLK_SEL0
VEE
1
2
3
4
5
6
7
8
24 VDDO
23 QB1
22 nQB1
21 VDDO
20 QB2
19 nQB2
18 CLK_SEL1
17 IREF
14-0121
1 PI6C49S1506
Rev C
08/11/14
1 page  
PI6C49S1506
High Performance Differential Fanout Buffer
DC Electrical Specifications - LVCMOS Inputs
Symbol Parameter
Conditions
IIH Input High current
Input = VDD
IIL Input Low current
Input = GND
VIH Input high voltage
VDD=3.3V
VIL Input low voltage
VDD=3.3V
VIH Input high voltage
VDD=2.5V
VIL Input low voltage
VDD=2.5V
Min. Typ.
-150
2.0
-0.3
1.7
-0.3
Max.
150
Units
uA
uA
VDD+0.3 V
0.8 V
VDD+0.3 V
0.7 V
DC Electrical Specifications- LVPECL Outputs
Parameter
VOH
Description
Output High voltage
VOL Output Low voltage
Conditions
VDD=3.3V
VDD=2.5V
VDD=3.3V
VDD=2.5V
Min.
2.1
1.3
1.3
0.5
Typ.
Max.
2.6
1.6
1.8
0.8
Units
V
V
DC Electrical Specifications- LVDS Outputs
Parameter
VOH
VOL
Vocm
DVocm
Ro
Description
Output High voltage
Output Low voltage
Output common mode voltage
Change in Vocm between output
states
Output impedance
Conditions
14-0121
5
Min.
85
Typ.
1.433
1.064
1.25
Max.
55
140
Units
V
V
V
mV
W
PI6C49S1506
Rev C
08/11/14
5 Page 
Driving X1 with a Single Ended Input
CMOS
Clock
Rs 0.1µF
50Ω
50Ω
X1
Osc
Input
X2
PI6C49S1506
High Performance Differential Fanout Buffer
Single Ended Input, AC couple
CMOS
Clock
Rs 0.1µF
0.1µF
50Ω
50Ω
0.1µF
Differential
Clock
Input
Single Ended Input, DC couple
CMOS
Clock
Rs 0.1µF
50Ω
VDD 50Ω
0.1µF
Differential
Clock
Input
Clock IC crystal input guide
Clock IC
Rf
C_in
XTL_IN
Cb
Crystal (CL)
C_out
XTL_OUT
Cb
C1 C2
LVPECL, AC Couple, Thevenin Equivalent
VDDO
0.1µF
QAn+/ QBn+
RPU
LVPECL
Driver
QAn-/ QBn-
RT
100Ω Differential
0.1µF
RPD VDDO LVPECL
Receiver
RPU
RT
VDDO RT
RPD
RPU RPD
3.3V 160Ω 120Ω 82Ω
2.5V 91Ω 250Ω 62.5Ω
LVPECL, DC Couple, Thevenin Equivalent
VDDO
QAn+/ QBn+
RPU
LVPECL
Driver
QAn-/ QBn-
100Ω Differential
RPD VDDO LVPECL
Receiver
RPU
VDDO RPU RPD
3.3V 120Ω 82Ω
2.5V 250Ω 62.5Ω
RPD
14-0121
11 PI6C49S1506
Rev C
08/11/14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet PI6C49S1506.PDF ] | |
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