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PI6C4911506-06 の電気的特性と機能

PI6C4911506-06のメーカーはPericom Semiconductorです、この部品の機能は「Crystal/LVCMOS/Differential - LVPECL Fanout Buffer」です。


製品の詳細 ( Datasheet PDF )

部品番号 PI6C4911506-06
部品説明 Crystal/LVCMOS/Differential - LVPECL Fanout Buffer
メーカ Pericom Semiconductor
ロゴ Pericom Semiconductor ロゴ 




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PI6C4911506-06 Datasheet, PI6C4911506-06 PDF,ピン配置, 機能
PI6C4911506-06
Low Skew, 1-To-6, Crystal/LVCMOS/Differential -
3.3V, 2.5V LVPECL Fanout Buffer
Features
ÎÎ6 LVPECL outputs
ÎÎUp to 1.5GHz output frequency
ÎÎUltra low additive phase jitter: < 0.03 ps (typ) (differential
156.25MHz, 12KHz to 20MHz integration range)
ÎÎSelectable reference inputs support either single-ended
or differential or Xtal
ÎÎLow skew between outputs within banks (<40ps)
ÎÎLow delay from input to output (Tpd typ. 1.5ns)
ÎÎSeparate Input output supply voltage for level shifting
ÎÎ2.5V / 3.3V power supply
ÎÎIndustrial temperature support
ÎÎTSSOP-24 package
Description
The PI6C4911506-06 is a high performance LVPECL fanout
buffer device that accepts crystal, single ended and differential
inputs. The part supports up to 1.5GHz frequency. This device is
ideal for systems that need to distribute low jitter clock signals to
multiple destinations.
Block Diagram
Pin Configuration (24-Pin TSSOP)
CLK_EN Pullup
CLK_SEL0 Pulldown
CLK_SEL1 Pulldown
XTAL_IN
XTAL_OUT
OSC
CLK0 Pulldown
CLK1 Pulldown
nCLK1 Pullup
00
01
1X
D
Q
LE
Q0
nQ0
6 LVPECL Outputs
Q5
nQ5
nQ2
Q2
VDD
nQ1
Q1
VEE
nQ0
Q0
CLK_SEL0
XTAL_IN
XTAL_OUT
CLK_EN
1
2
3
4
5
6
7
8
9
10
11
12
24 Q3
23 nQ3
22 VDD
21 Q4
20 nQ4
19 VDD
18 Q5
17 nQ5
16 CLK_SEL1
15 nCLK1
14 CLK1
13 CLK0
12-0290
1 www.pericom.com PI6C4911506-06 RevA 11/02/2012

1 Page





PI6C4911506-06 pdf, ピン配列
PI6C4911506-06
Low Skew, 1-To-6, Crystal/LVCMOS/Differantial -
3.3V, 2.5V LVPECL Fanout Buffer
Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested)
Storage temperature...................................................-55 to +150ºC
Supply Voltage to Ground Potential (VDD)........... -0.5 to +4.6V
Inputs (Referenced to GND)............................-0.5 to VDD+0.5V
Clock Output (Referenced to GND)...............-0.5 to VDD+0.5V
Soldering Temperature (Max of 10 seconds).....................+260ºC
Latch up...................................................................................200mA
ESD Protection (Input)................................... 2000 V min (HBM)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
Power Supply Characteristics and Operating Conditions
Symbol
VDD
IDD
TA
Parameter
Test Condition
Core Supply Voltage
Core Power Supply Current
Ambient Operating Temperature
Outputs unloaded
Min.
3.135
2.375
-40
Typ.
Max.
3.465
2.625
150
85
Units
V
V
mA
°C
LVCMOS / LVTTL DC Characteristics, VDD = 3.3V±5% or 2.5V±5%, VEE = 0V, TA = -40°C to 85°C
Symbol
VIH
VIL
IIH
IIL
Parameter
Input High Voltage
Input Low Voltage
CLK0,
Input High Current CLK_SEL0:1
CLK_EN
Input Low Current
CLK0,
CLK_SEL0:1
CLK_EN
Test Condition
VDD = 3.3V
VDD = 2.5V
VDD = 3.3V
VDD = 2.5V
VDD = VIN = 3.465V or 2.625V
VDD = VIN = 3.465V or 2.625V
0VVDD = 3.465V or 2.625V, VIN =
V0VDD = 3.465V or 2.625V, VIN =
Min.
2
1.7
-0.3
-0.3
Typ.
-15
-150
Max.
VDD+0.3
VDD+0.3
0.8
0.7
150
20
Units
V
μA
12-0290
3 www.pericom.com PI6C4911506-06 RevA 11/02/2012


3Pages


PI6C4911506-06 電子部品, 半導体
PI6C4911506-06
Low Skew, 1-To-6, Crystal/LVCMOS/Differantial -
3.3V, 2.5V LVPECL Fanout Buffer
Pin Characteristics
Symbol
CIN
RPULLDOWN
RPULLUP
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pulup Resistor
Conditions
CLK0, CLK1
nCLK1
Control Input Function Table
CLK_EN
0
0
0
1
1
1
Inputs
CLK_SEL1
0
0
1
0
0
1
CLK_SEL0
0
1
X
0
1
X
Selected Source
XTAL
CLK0
CLK1/ nCLK1
XTAL
CLK0
CLK1/ nCLK1
Min Typ Max Units
4 pF
51 kΩ
51 kΩ
Q0:Q5
Low
Low
Low
Enabled
Enabled
Enabled
Outputs
nQ0:nQ5
High
High
High
Enabled
Enabled
Enabled
Configuration Test Load Board Termination for LVPECL
VDD
Device
ZO = 50Ω
TLA
L = 0 ~ 10in
TLA
ZO = 50Ω
100Ω
150Ω
150Ω
12-0290
6 www.pericom.com PI6C4911506-06 RevA 11/02/2012

6 Page



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部品番号部品説明メーカ
PI6C4911506-06

Crystal/LVCMOS/Differential - LVPECL Fanout Buffer

Pericom Semiconductor
Pericom Semiconductor


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