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PDF PI6C49X0206T Data sheet ( Hoja de datos )

Número de pieza PI6C49X0206T
Descripción 1-To-6 LVCMOS / LVTTL Fanout Buffer
Fabricantes Pericom Semiconductor 
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PI6C49X0206T
Low Skew, 1-To-6 LVCMOS / LVTTL Fanout Buffer
Features
ÎÎ6 LVCMOS / LVTTL outputs
ÎÎLVCMOS / LVTTL clock input accepts LVCMOS or LVTTL
input levels
ÎÎMaximum output frequency: 250MHz
ÎÎPart-to-part skew: 250ps (typical)
ÎÎFull 3.3V, 2.5V, 1.8V operation mode, or 3.3V/ 2.5V/ 1.8V
core with 2.5V, 1.8V, 1.5V supply modes
ÎÎ-40°C to 85°C ambient operating temperature
ÎÎLead-Free package fully RoHS compliant
Description
The PI6C49X0206T is a low skew, 1-to-6 LVCMOS/LVTTL
High Performance Fanout Buffer. The PI6C49X0206T has a
single ended clock input. The single ended clock input accepts
LVCMOS or LVTTL input levels. The PI6C49X0206T features a
pair of LVCMOS/LVTTL outputs. Guaranteed output and part-to-
part skew characteristics make the PI6C49X0206T ideal for clock
distribution applications demanding well defined performance
and repeatibility.
Block Diagram
CLK
OE
15-0131
Pin Assignment
Q0
Q1 CLK 1
OE 2
Q2
Q0 3
Q3
GND
4
VDD
5
Q4 Q4 6
GND
7
Q5
14 Q1
13 Q3
12 VDDO
11 Q2
10 GND
9 Q5
8 VDDO
1 www.pericom.com PI6C49X0206T
Rev B
10/05/2015

1 page




PI6C49X0206T pdf
PI6C49X0206T
Low Skew, 1-To-6 LVCMOS / LVTTL Fanout Buffer
AC CHARACTERISTICS, VDD = 3.3V ± 5%, TA = -45°C to 85°C
Symbol
Parameter
Conditions
Min. Typ. Max. Units
VDDO = 3.3V
250
fMAX
tpLH
tsk(o)
Output Frequency
Propagation Delay, Low-to-High;
NOTE 1
Output Skew; NOTE 2
VDDO = 2.5V
VDDO = 1.8V
VDDO = 1.5V
VDDO = 3.3V, IJ
250MHz
VDDO = 2.5V, IJ
250MHz
VDDO = 1.8V, IJ
250MHz
VDDO = 1.5V, IJ
250MHz
VDDO = 2.5V, 3.3V
VDDO = 1.5V, 1.8V
250 MHz
250
250
1.2 1.6 2.8
1.45 1.9
3.3
ns
2.2 2.8 3.6
3.25 4
4.7
68 100 ps
80 150 ps
tsk(pp)
Part-to-Part Skew; NOTE 3
250 800
ps
VDDO = 3.3V
300
800
VDDO = 2.5V
300
800
tR
Output Rise Time NOTE 4
VDDO = 1.8V
300
ps
800
VDDO = 1.5V
600
1000
VDDO = 3.3V
300
800
VDDO = 2.5V
300
800
tF
Output Fall Time NOTE 4
VDDO = 1.8V
300
ps
800
VDDO = 1.5V
600
1000
odc Output Duty Cycle
IJ 133MHz
133MHz < IJ 250MHz
45
40
55 %
60 %
tjit Additive RMS Jitter
156.25MHz (@12kHz to
20MHz)
125MHz (@12kHz to
20MHz)
0.03
0.05
ps
ps
tOED Output Disable Time
6 ns
tOE Output Enable Time
6 ns
Parameters measured at f MAX unless otherwise noted.
NOTE 1: Measured from VDD /2 of the input to VDDO /2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO /2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at VDDO /2.
NOTE 4: Defined from 20% to 80%
15-0131
5 www.pericom.com PI6C49X0206T
Rev B
10/05/2015

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