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PI6C49021 の電気的特性と機能

PI6C49021のメーカーはPericom Semiconductorです、この部品の機能は「Low Power High Integration Clock Generator」です。


製品の詳細 ( Datasheet PDF )

部品番号 PI6C49021
部品説明 Low Power High Integration Clock Generator
メーカ Pericom Semiconductor
ロゴ Pericom Semiconductor ロゴ 




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PI6C49021 Datasheet, PI6C49021 PDF,ピン配置, 機能
PI6C49021
Low Power High Integration Clock Generator
Features
ÎÎ3.3V supply voltage
ÎÎ25MHz XTAL or reference clock input
ÎÎOutput
àà 3 x low power PCIe 2.0 100MHz clock with spread
spectrum support and integrate series termination
resistor
àà 2 x 66.667MHz LVCMOS clock for CPU
àà 1 x 125MHz LVCMOS clock for Gigabit Ethernet
àà 2 x 50MHz LVCMOS clock for CPLD
àà 3 x 25MHz LVCMOS clock for Ethernet PHY
àà 2 x 25MHz low jitter LVPECL Ethernet clock
àà 1 x 24MHz LVCMOS for USB PHY
ÎÎPackaging (Pb free and Green)
àà 48-pin TQFN
Description
The new PI6C49021 is a high integration clock generator intended
for all kinds of embedded applications and networking application
with PCIe interface. The device is the most cost effective way
to generate multi-frequencies and multi-outputs clocks from
a 25MHz crystal and reference clock. The device can generate
100MHz HCSL clock, single-ended clocks includes 24MHz,
25MHz, 50HMz, 125HMz, and low jitter 25MHz LVPECL clock.
Block Diagram
25MHz XTAL or
clock input
X1
X2
OE_PCIE
OE_PECL
SCLK
SDATA
KA
T
Crystal
Oscillator
3
PLL Clock Synthesis
& Spread Spectrum
& Control Circuit
2
2
3
I2C Control
Circuit
2
PCIE(0-2)
SE_66M(0~1)
SE_125M
SE_50M(0~1)
SE_25M(0,2)
2)
SE_24M
PECL_25M(0~1)
13-0015
1
www.pericom.com P-0.1 02/27/13

1 Page





PI6C49021 pdf, ピン配列
PI6C49021
Low Power High Integration Clock Generator
Pin List
Pin#
22
23
25
27
29
33
37
38
40
41
44
45
47
48
Pin Name
OE_PCIE
OE_PECL
SE_24M
SE_66M0
SE_66M1
SE_125M
PECL_25M0
PECL_25M0#
PECL_25M1
PECL_25M1#
PCIE0
PCIE0#
PCIE1
PCIE1#
Pin Type
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Pin Description
100MHz HCSL PCIE2 enable pin. Set High to enable.
25MHz LVPECL PECL 25M1 enable pin. Set High to
enable.
24MHz LVCMOS output
66.667MHz LVCMOS output
66.667MHz LVCMOS output
125MHz LVCMOS output
25MHz differential output
25MHz differential output
25MHz differential output
25MHz differential output
100MHz HCSL output
100MHz HCSL output
100MHz HCSL output
100MHz HCSL output
Notes: VDD and GND Pins Layout Guide
1. Small value decoupling caps. (0.1uF, 1uF, and 2.2uF) should be placed close each VDD pin or its via
2. Connect all GND pins to package thermal pad which must be connected to the GND plane for better thermal distribution and
signal conducting with reasonable via count (>8)
All trademarks are property of their respective owners.
13-0015
3
www.pericom.com P-0.1 02/27/13


3Pages


PI6C49021 電子部品, 半導体
PI6C49021
Low Power High Integration Clock Generator
Byte 0: Bit 6 and Bit 5 Functionality
Bit
Bit 5
Description
0 X RESET# = "H" will enable all outputs; SMBus can not control each output.
10
Disable all outputs and tri-states the outputs. When pin 18 (RESET#) is set low, force device to power-on
reset and set all registers to default values.
11
Enable outputs according to the SMBus default values; SMBus can control each output. When pin 18 (RE-
SET#) is set low, force to power-on reset and set all registers to default values.
Byte 1: Control Register
Bit Description
Type
7 OE for SE_125M
6 OE for SE_50M0
5 OE for SE_50M1
4 OE for SE_25M0
RW
RW
RW
RW
3 OE for SE_25M1
RW
2 OE for SE_24M
RW
1
Spread Spectrum Selection for
RW
100MHz HCSL PCI Express clocks
0 Bit 1: SS1, Bit 0:SS0
RW
Power Up Condi-
tion
Output(s) Affected
1 SE_125M
1 SE_50M0
1 SE_50M1
1 SE_25M0
1 SE_25M1
1 SE_24M
0
All 100MHz HCSL PCI
0 Express outputs
Notes
0 = disabled
1 = enabled
0 = disabled
1 = enabled
0 = disabled
1 = enabled
0 = disabled
1 = enabled
0 = disabled
1 = enabled
0 = disabled
1 = enabled
See Selection Table
2 - Spread Spec-
trum
Byte 2: Control Register
Bit Description
7 to 0 Reserved
Type
R
Power Up Condi-
tion
Output(s) Affected
Undefined
Not Applicable
Notes
All trademarks are property of their respective owners.
13-0015
6
www.pericom.com P-0.1 02/27/13

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
PI6C49021

Low Power High Integration Clock Generator

Pericom Semiconductor
Pericom Semiconductor
PI6C49021B

Low Power High Integration Clock Generator

Pericom Semiconductor
Pericom Semiconductor


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