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HV2705 の電気的特性と機能

HV2705のメーカーはSupertexです、この部品の機能は「Analog Switches」です。


製品の詳細 ( Datasheet PDF )

部品番号 HV2705
部品説明 Analog Switches
メーカ Supertex
ロゴ Supertex ロゴ 




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HV2705 Datasheet, HV2705 PDF,ピン配置, 機能
Supertex inc.
HV2705
HV2706
Low Harmonic Distortion, 16-Channel,
High Voltage, Analog Switches
with Bleed Resistors
Features
HVCMOS technology for high performance
Integrated bleed resistors on the outputs
16-channel high voltage analog switch
3.3V input logic level compatible
20MHz data shift clock frequency
Very low quiescent power dissipation (-10µA)
Low parasitic capacitance
DC to 50MHz small signal frequency
response
-60dB typical off-isolation at 5.0MHz
CMOS logic circuitry for low power
Low harmonic distortion
Cascadable serial data register with latches
Flexible operating supply voltages
Applications
Medical ultrasound imaging
NDT metal flaw detection
Piezoelectric transducer drivers
Optical MEMS modules
General Description
The Supertex HV2705 and HV2706 are low charge injection,
16-channel, high voltage analog switch integrated circuits (ICs) with
bleed resistors. The devices can be used in applications requiring
high voltage switching controlled by low voltage control signals, such
as medical ultrasound imaging and piezoelectric transducer drivers.
The bleed resistors eliminate voltage build-up on capacitive loads
such as piezoelectric transducers. The HV2706 has a different pin
configuration than the HV2705.
Input data are shifted into a 16-bit shift register that can then be
retained in a 16-bit latch. To reduce any possible clock feed-through
noise, the latch enable bar should be left high until all bits are clocked
in. Data are clocked in during the rising edge of the clock. Using
HVCMOS technology, this device combines high voltage bilateral
DMOS switches and low power CMOS logic to provide efficient
control of high voltage analog signals.
The device is suitable for various combinations of high voltage
supplies, e.g., VPP/VNN: +40V/-160V, +100V/-100V, and +160V/-40V.
Block Diagram
Latches
D
LE
CLR
Level
Output
Shifters Switches
SW0
DIN
16-Bit
CLK
Shift
Register
D
LE
CLR
D
LE
CLR
SW1
SW2
DOUT
D
LE
CLR
D
LE
CLR
SW14
SW15
Doc.# DSFP-HV2705_HV2706
B051512
VDD GND LE CLR
VNN VPP
RGND
Supertex inc.
www.supertex.com

1 Page





HV2705 pdf, ピン配列
DC Electrical Characteristics
(over recommended operating conditions unless otherwise noted)
Sym Parameter
0°C +25°C
Min Max Min Typ Max
- 30 - 26 38
- 25 - 22 27
RONS
Small signal switch
on-resistance
- 25 - 22 27
- 18 - 18 24
- 23 - 20 25
- 22 - 16 25
∆RONS
Small signal switch
on-resistance matching
- 20 - 5.0 20
RONL
Large signal switch
on-resistance
- - - 15 -
+70°C
Min Max
- 48
- 32
- 30
- 27
- 30
- 27
- 20
--
HV2705
HV2706
Units
Conditions
ISIG = 5.0mA
ISIG = 200mA
ISIG = 5.0mA
ISIG = 200mA
ISIG = 5.0mA
ISIG = 200mA
VPP = +40V
VNN = -160V
VPP = +100V
VNN = -100V
VPP = +160V
VNN = -40V
%
ISIG = 5.0mA, VPP = +100V,
VNN = -100V
VSIG= VPP -10V, ISIG = 1.0A
RINT Value of output bleed resistor -
- 20 35 50 -
ISOL
Switch off leakage per
switch*
- 5.0 - 1.0 10 -
DC offset switch off*
VOS DC offset switch on*
- 300 - 100 300 -
- 500 - 100 500 -
IPPQ Quiescent VPP supply current
-
-
- 10 50 -
INNQ Quiescent VNN supply current
-
-
- -10 -50 -
IPPQ Quiescent VPP supply current
-
-
- 10 50 -
INNQ Quiescent VNN supply current
-
-
- -10 -50 -
ISW Switch output peak current
- 3.0 - 3.0 2.0 -
fSW Output switching frequency - - - - 50 -
- 6.5 -
- 7.0 -
IPP Average VPP supply current
- 4.0 -
- 5.5 -
- 4.0 -
- 5.0 -
-
15
300
500
-
-
-
-
2.0
-
8.0
5.5
5.5
- 6.5 -
- 7.0 -
8.0
INN Average VNN supply current
- 4.0 -
- 5.0 -
5.5
- 4.0 -
- 5.0 -
IDD Average VDD supply current
- 4.0 -
- 4.0 -
IDDQ Quiescent VDD supply current - 10 -
- 10 -
ISOR Data out source current
0.45 - 0.45 0.70 - 0.40
ISINK Data out sink current
0.45 - 0.45 0.70 - 0.40
CIN Logic input capacitance
* See Test Circuits on page 5
- 10 -
- 10 -
5.5
4.0
10
-
-
10
kΩ
Output Switch to RGND
IRINT = 0.5mA
µA VSIG = VPP -10V and VNN +10V
mV
No Load
mV
µA All switches off
µA All switches off
µA All switches on, ISW = 5.0mA
µA All switches on, ISW = 5.0mA
A VSIG duty cycle < 0.1%
kHz Duty cycle = 50%
VPP = +40V
VNN = -160V
mA
VPP = +100V
VNN = -100V
VPP = +160V
VNN = -40V
VPP = +40V
VNN = -160V
mA
VPP = +100V
VNN = -100V
VPP = +160V
VNN= -40V
All output
switches are
turning ON
and OFF at
50kHz with
no load.
mA fCLK = 5.0MHz, VDD = 5.0V
µA All logic inputs are static
mA VOUT = VDD-0.7V
mA VOUT = 0.7V
pF ---
Doc.# DSFP-HV2705_HV2706
B051512
3
Supertex inc.
www.supertex.com


3Pages


HV2705 電子部品, 半導体
Logic Function Table
HV2705
HV2706
D0 D1 ... D7 D8 ... D15 LE CLR SW0 SW1 ... SW7 SW8 ... SW15
L-
--
- L L OFF -
--
-
H-
--
- L L ON -
--
-
-L
--
- L L - OFF
--
-
-H
--
- L L - ON
--
-
--
--
- LL- -
--
-
--
--
- LL- -
--
-
--
L-
- LL- -
OFF
-
-
--
H-
- LL- -
ON -
-
- - ... - L ... - L L - - ... - OFF ... -
--
-H
- LL- -
- ON
-
--
--
- LL- -
--
-
--
--
- LL- -
--
-
--
--
- LL- -
--
-
--
--
- LL- -
--
-
--
--
LLL- -
--
OFF
--
--
HLL - -
--
ON
X XXX XXX H L
HOLD PREVIOUS STATE
X XXX XXX X H
ALL SWITCHES OFF
Notes:
1. The 16 switches operate independently.
2. Serial data is clocked in on the L to H transition of the CLK.
3. All 16 switches go to a state retaining their latched condition at the rising edge of LE. When LE is low the shift registers data flow through the
latch.
4.
5.
SDhOUifTt
is high when data
registers clocking
in the shift register 15 is high.
has no effect on the switch states
if
LE
is
high.
6. The CLR clear input overrides all other inputs.
Logic Timing Waveforms
DATA IN
DIN
DN + 1
5 0%
DN
50%
DN - 1
LE
CLOCK
DATA OUT
DOUT
VOUT
(typ)
OFF
ON
CLR
5 0%
50%
50%
tWLE
tSD
50%
tSU th
tDO
50%
tOFF
90%
5 0%
tWCL
50%
tON
1 0%
Doc.# DSFP-HV2705_HV2706
B051512
6
Supertex inc.
www.supertex.com

6 Page



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