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HV256 の電気的特性と機能

HV256のメーカーはSupertexです、この部品の機能は「32-Channel High Voltage Amplifier Array」です。


製品の詳細 ( Datasheet PDF )

部品番号 HV256
部品説明 32-Channel High Voltage Amplifier Array
メーカ Supertex
ロゴ Supertex ロゴ 




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HV256 Datasheet, HV256 PDF,ピン配置, 機能
Supertex inc.
HV256
32-Channel High Voltage
Amplifier Array
Features
32 independent high voltage amplifiers
300V operating voltage
295V output voltage
2.2V/µs typical output slew rate
Adjustable output current source limit
Adjustable output current sink limit
Internal closed loop gain of 72V/V
12MΩ feedback impedance
Layout ideal for die applications
Applications
MEMS (microelectromechanical systems) driver
Piezoelectric transducer driver
Optical crosspoint switches (using MEMS
technology)
General Description
The Supertex HV256 is a 32-channel, high voltage, amplifier
array integrated circuit. It operates on a single high voltage
supply, up to 300V, and two low voltage supplies, VDD and VNN.
The input voltage range is from 0 to 4.096V. The internal closed
loop gain is 72V/V, giving an output voltage of 295V when
4.096V is applied. Input voltages of up to 5.0V can be applied,
but will cause the output to saturate. The maximum output
voltage swing is 5.0V below the VPP high voltage supply. The
outputs can drive capacitive loads of up to 3000pF.
The maximum output source and sink current can be adjusted
by using two external resistors. An external RSOURCE resistor
controls the maximum sourcing current and an external RSINK
resistor controls the maximum sinking current. The current
limit is approximately 12.5V divided by the external resistor
value. The setting is common for all 32 outputs. A low voltage
silicon junction diode is made available to help monitor the die
temperature.
Typical Application Circuit
Micro
Processor
DAC
DAC
DAC
DAC
VIN0
VIN0
VIN0
VIN0
VDD VPP HV256
High Voltage
Op-Amp
Array
HVOUT0
HVOUT1
HVOUT2
HVOUT3
DAC
DAC
VIN30
VIN31
HVOUT30
HVOUT31
AGND
VNN
y
xx
y
MEMS
Array
Doc.# DSFP-HV256
D070813
Supertex inc.
www.supertex.com

1 Page





HV256 pdf, ピン配列
Electrical Characteristics (over operating conditions, unless otherwise specified
Sym
HVOUT
VIN
VINOS
SR
BW
AO
AV
RFB
CLOAD
ISOURCE
ISINK
RSOURCE
RSINK
CTDC
PSRR
Parameter
HVOUT voltage swing
Input voltage range
Input voltage offset
HVOUT slew rate rise
HVOUT slew rate fall
HVOUT -3dB channel bandwidth
Open loop gain
Closed loop gain
Feedback resistance from HVOUT to ground
HVOUT capacitive load
HVOUT sourcing current limiting range
HVOUT sinking current limiting range
External resistance range for setting
maximum current source
External resistance range for setting
maximum current sink
DC channel to channel crosstalk
Power supply rejection ratio for VPP, VDD, VNN
Min
0
0
-
-
-
-
70
68.4
9.6
0
385
385
Typ
-
-
-
2.2
2.0
4.0
100
72.0
12.0
-
550
550
Max
VPP -5.0
5.0
±50
-
-
-
-
75.6
-
3000
715
715
25 -
250
25 -
-80 -
-40 -
250
-
-
HV256
Units Conditions
V ---
V ---
mV Input referred
V/µs No load
V/µs No load
KHz
dB
VPP = 300V
---
V/V ---
MΩ ---
pF ---
µA RSOURCE = 25KΩ
µA RSINK = 25KΩ
KΩ ---
KΩ ---
dB ---
dB ---
Temperature Diode
Sym
PIV Peak inverse voltage
VF Forward diode drop
IF Forward diode current
TC VF temperature coefficient
Min Typ
--
- 0.6
--
- -2.2
Max Units Conditions
5.0 V cathode to anode
-
V
IF = 100µA, anode to
cathode at TA = 25°C
100 µA anode to cathode
- mV/°C anode to cathode
Doc.# DSFP-HV256
D070813
Supertex inc.
3 www.supertex.com


3Pages


HV256 電子部品, 半導体
HV256
RSINK / RSOURCE
The VDD_BYP, VDD_BYP, and VNN_BYP pins are internal,
high impedance current, mirror gate nodes, brought out to
mantain stable opamp biasing currents in noisy power supply
environments. 0.1uF/25V bypass capacitors, added from
the VPP_BYP pin to VPP, from VDD_BYP pin to VDD, and
from VNN_BYP to VNN, will force the high impedance gate
nodes to follow the fluctuation of power lines. The expected
voltages at the VDD_BYP, and VNN_BYP pins are typically
1.5 volts from their respectful power supply. The expected
voltage at VPP_BYP is typically 3.0V below VPP.
VPP
BYP_VPP Cap
0.1µF/25V
Current limit
BYP_VPP
BYP_VDD
BYP_VDD Cap
0.1µF/25V
VDD
BYP_VNN
BYP_VNN Cap
0.1µF/25V
Set by RSOURCE
To internal biasing
HVOpamp HVOUT0
HVOUT31
HVOpamp
Set by RSINK
Current limit
VNN
Typical Characteristics
ISINK vs RSINK
(VPP = 300V, VDD = 6.5V, VNN = 5.5V, TA = 25OC)
600
500
400
300
200
100
0
25
max
min
150
RSINK (kΩ)
600
500
400
300
200
100
0
250 25
ISOURCE vs RSOURCE
(VPP = 300V, VDD = 6.5V, VNN = 5.5V, TA = 25OC)
150
RSOURCE (kΩ)
max
min
250
Doc.# DSFP-HV256
D070813
Supertex inc.
6 www.supertex.com

6 Page



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