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Número de pieza | HV2221FG-G | |
Descripción | Analog Switch | |
Fabricantes | Supertex | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HV2221FG-G (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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HV2221
Low Charge Injection, 8-Channel,
Unipolar, Negative High Voltage, Analog Switch
Features
►► Low on-resistance, 14Ω max.
►► HVCMOS technology for high performance
►► 3.3 or 5.0V CMOS input logic level
►► 20MHz data shift clock frequency
►► Very low quiescent power dissipation (-10µA)
►► Low parasitic capacitance
►► DC to 50MHz small signal frequency response
►► -60dB typical off-isolation at 5MHz
►► CMOS logic circuitry for low power
►► Excellent noise immunity
►► Cascadable serial data register with latches
►► Flexible operating supply voltages
Applications
►► NDT metal flaw detection
►► Medical ultrasound imaging
►► Piezoelectric transducer drivers
►► Inkjet printer heads
►► Optical MEMS modules
General Description
The Supertex HV2221 is a low charge injection, 8-channel,
unipolar, negative high voltage, analog switch integrated
circuit (IC) intended for use in applications requiring high
voltage switching controlled by low voltage control signals,
such as NDT ultrasound flaw detection, medical ultrasound
imaging, piezoelectric transducer drivers, and printers.
Data is input into an 8-bit shift register that can then be
retained in an 8-bit latch. To reduce any possible clock feed-
through noise, the latch enable bar should be left high until all
bits are clocked in. Data is clocked in during the rising edge
of the clock.
Using HVCMOS technology, this device combines high
voltage bilateral DMOS switches and low power CMOS logic
to provide efficient control of high voltage analog signals.
Block Diagram
CLK
8-Bit
Shift
DIN Register
Latches
D
LE
CLR
D
LE
CLR
D
LE
CLR
Level
Shifters
Output
Switches
SW0
SW1
SW2
DOUT
D
LE
CLR
D
LE
CLR
SW6
SW7
VDD GND LE CLR
VNN VPP
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
1 page HV2221
Truth Table
D0 D1 D2 D3 D4 D5 D6 D7 LE CLR SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L L L Off
H L L On
L
LL
Off
H
LL
On
L
LL
Off
H
LL
On
L
LL
Off
H
LL
On
L LL
Off
H LL
On
L LL
Off
H LL
On
L LL
Off
H LL
On
LLL
Off
HLL
On
XXXXXXXXH L
Hold Previous State
XXXXXXXXXH
All Switches Off
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L to H transition of the CLK.
3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flow through the latch.
4.
5.
SDhOUifTt
is high when data in the
register clocking has no
shift register
effect on the
7 is high.
switch states
if
LE
is
high.
6. The CLR clear input overrides all other inputs.
Logic Timing Waveforms
DN+1
DN
DATA IN
50%
50%
DN-1
LE
CLK
50%
50%
tWLE
tSD
50%
tSU th
tDO
50%
DATA OUT
VOUT OFF
(typ)
ON
50%
tOFF
90%
tON
10%
CLR
50%
50%
tWCL
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet HV2221FG-G.PDF ] |
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