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PDF 11AA02UID Data sheet ( Hoja de datos )
| Número de pieza | 11AA02UID | |
| Descripción | EEPROM | |
| Fabricantes | Microchip | |
| Logotipo |  |
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11AA02UID
2K UNI/O® Serial EEPROM with Unique 32-Bit Serial Number
DEVICE SELECTION TABLE
Part Number
Density
(bits)
VCC Range
11AA02UID
2K
1.8-5.5V
Page Size
(Bytes)
16
Temp.
Ranges
I
Packages
SN, TT
Unique ID
Length
32-Bit
Features:
• Preprogrammed 32-Bit Serial Number:
- Unique across all UID-family EEPROMs
- Scalable to 48-bit, 64-bit, 128-bit, 256-bit,
and other lengths
• Single I/O, UNI/O® Serial Interface Bus
• Low-Power CMOS Technology:
- 1 mA active current, typical
- 1 µA standby current (max.)
• 256 x 8 Bit Organization
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kbps Max. Bit Rate – Equivalent to 100 kHz
Clock Frequency
• Self-Timed Write Cycle (including Auto-Erase)
• Page-Write Buffer for up to 16 Bytes
• STATUS Register for Added Control:
- Write enable latch bit
- Write-In-Progress bit
• Block Write Protection:
- Protect none, 1/4, 1/2 or all of array
• Built-in Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
• High Reliability:
- Endurance: 1,000,000 erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4,000V
• 3-Lead SOT-23 and 8-Lead SOIC Packages
• RoHS Compliant
• Available Temperature Ranges:
- Industrial (I): -40°C to +85°C
Description:
The Microchip Technology Inc. 11AA02UID device is a
2 Kbit Serial Electrically Erasable PROM with a
preprogrammed, 32-bit unique ID. The device is
organized in blocks of x8-bit memory and support the
patented* single I/O UNI/O® serial bus. By using
Manchester encoding techniques, the clock and data
are combined into a single, serial bit stream (SCIO),
where the clock signal is extracted by the receiver to
correctly decode the timing and value of each bit.
Low-voltage design permits operation down to 1.8V,
with standby and active currents of only 1 uA and 1 mA,
respectively.
The 11AA02UID is available in standard 8-lead SOIC
and 3-lead SOT-23 packages.
Package Types (not to scale)
SOT23
(TT)
VSS 3
2 VCC
1 SCIO
SOIC
(SN)
NC
NC
NC
VSS
1
2
3
4
8 VCC
7 NC
6 NC
5 SCIO
Pin Function Table
Name
Function
SCIO
VSS
VCC
Serial Clock, Data Input/Output
Ground
Supply Voltage
* Microchip’s UNI/O® Bus products are covered by the following patents issued in the U.S.A.: 7,376,020 and 7,788,430.
2013 Microchip Technology Inc.
DS20005206A-page 1
1 page  
2.0 FUNCTIONAL DESCRIPTION
2.1 Principles of Operation
The 11AA02UID family of serial EEPROMs support
the UNI/O® protocol. They can be interfaced with
microcontrollers, including Microchip’s PIC® microcon-
trollers, ASICs, or any other device with an available
discrete I/O line that can be configured properly to
match the UNI/O protocol.
The 11AA02UID devices contain an 8-bit instruction
register. The devices are accessed via the SCIO pin.
Data is embedded into the I/O stream through
Manchester encoding. The bus is controlled by a
master device which determines the clock period, con-
trols the bus access and initiates all operations, while
the 11AA02UID works as slave. Both master and slave
can operate as transmitter or receiver, but the master
device determines which mode is active.
FIGURE 2-1:
STATUS
Register
BLOCK DIAGRAM
HV Generator
I/O Control
Logic
Current-
Limited
Slope
Control
SCIO
Memory
Control
Logic
X
Dec
EEPROM
Array
Page Latches
Y Decoder
VCC
VSS
Sense Amp.
R/W Control
11AA02UID
2013 Microchip Technology Inc.
DS20005206A-page 5
5 Page 
11AA02UID
4.3 Write Instruction
Prior to any attempt to write data to the 11AA02UID, the
write enable latch must be set by issuing the WREN
instruction (see Section 4.4 “Write Enable (WREN)
and Write Disable (WRDI) Instructions”).
Once the write enable latch is set, the user may
proceed with issuing a WRITE instruction (including
the header and device address bytes) followed by the
MSB and LSB of the Word Address. Once the last
Acknowledge sequence has been performed, the
master transmits the data byte to be written.
The 11AA02UID features a 16-byte page buffer, mean-
ing that up to 16 bytes can be written at one time. To
utilize this feature, the master can transmit up to 16
data bytes to the 11AA02UID, which are temporarily
stored in the page buffer. After each data byte, the
master sends a MAK, indicating whether or not another
data byte is to follow. A NoMAK indicates that no more
data is to follow, and as such will initiate the internal
write cycle.
Note:
If a NoMAK is generated before any data
has been provided, or if a standby pulse
occurs before the NoMAK is generated,
the 11AA02UID will be reset, and the write
cycle will not be initiated.
Upon receipt of each word, the four lower-order
Address Pointer bits are internally incremented by one.
The higher-order bits of the word address remain con-
stant. If the master should transmit data past the end of
the page, the address counter will roll over to the begin-
ning of the page, where further received data will be
written.
Note:
Page write operations are limited to writ-
ing bytes within a single physical page,
regardless of the number of bytes actu-
ally being written. Physical page boundar-
ies start at addresses that are integer
multiples of the page size (16 bytes) and
end at addresses that are integer multi-
ples of the page size minus 1. As an
example, the page that begins at address
0x30 ends at address 0x3F. If a page
Write command attempts to write across a
physical page boundary, the result is that
the data wraps around to the beginning of
the current page (overwriting data previ-
ously stored there), instead of being writ-
ten to the next page as might be expected.
It is therefore necessary for the applica-
tion software to prevent page write opera-
tions that would attempt to cross a page
boundary.
FIGURE 4-3:
WRITE COMMAND SEQUENCE
SCIO
Standby Pulse
Start Header
01010101
SCIO
Command
01101100
Word Address MSB
15 14 13 12 11 10 9 8
Device Address
10100000
Word Address LSB
76543210
SCIO
Data Byte 1
76543210
Data Byte 2
76543210
Data Byte n
76543210
Twc
2013 Microchip Technology Inc.
DS20005206A-page 11
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