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IX2120のメーカーはIXYSです、この部品の機能は「1200V High and Low Side Gate Driver」です。 |
部品番号 | IX2120 |
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部品説明 | 1200V High and Low Side Gate Driver | ||
メーカ | IXYS | ||
ロゴ | |||
このページの下部にプレビューとIX2120ダウンロード(pdfファイル)リンクがあります。 Total 13 pages
INTEGRATED CIRCUITS DIVISION
Driver Characteristics
Parameter
VOFFSET
IO +/- (Source/Sink)
VOUT
ton/toff
Rating
1200
2/2
15-20
250/210
Units
V
A
V
ns
Features
• Floating Channel for Bootstrap Operation to +1200V
• Outputs Capable of Sourcing and Sinking 2A
• Gate Drive Supply Range From 15V to 20V
• Enhanced Robustness due to SOI Process
• Tolerant to Negative Voltage Transients:
dV/dt Immune
• 3.3V Logic Compatible
• Undervoltage Lockout for Both High-Side and
Low-Side Outputs
IX2120 Functional Block Diagram
IX2120
1200V High and Low Side
Gate Driver
Description
The IX2120 is a high voltage integrated circuit that can
drive high speed MOSFETs and IGBTs that operate at
up to +1200V. The IX2120 is configured with
independent high-side and low-side referenced output
channels, both of which can source and sink 2A. The
floating high-side channel can drive an N-channel
power MOSFET or IGBT 1200V from the common
reference.
Manufactured on IXYS Integrated Circuits Division's
proprietary high-voltage BCDMOS on SOI (silicon on
insulator) process, the IX2120 is extremely robust, and
is virtually immune to negative transients. The UVLO
circuit prevents turn-on of the MOSFET or IGBT until
there is sufficient VBS or VCC supply voltage.
The IX2120 is available in a 28-pin SOIC package.
Ordering Information
Part
IX2120B
IX2120BTR
Description
28-Pin SOIC (28/Tube)
28-Pin SOIC (1000/Reel)
VB
VDD
High
Voltage
UVLO
Level R C
Level
Shift
Shift
Mid
Q
S
Buffer
HO
HIN
Input Control Logic
VDD / VCC
VSS / COM
Pulse
Generator
Voltage
Level
Shift
&
VS
SD Cycle-by-Cycle
Edge-Triggered
Shutdown
VBM
VSM
LIN
UVLO
VCC
Level
VSS
Shift
VDD / VCC
VSS / COM
LS Delay
Control
Buffer
LO
COM
DS-IX2120-R02
www.ixysic.com
1
1 Page INTEGRATED CIRCUITS DIVISION
IX2120
1 Specifications
Typical values are characteristic of the device at +25°C, and are the result of engineering evaluations. They are
provided for information purposes only, and are not part of the manufacturing testing requirements.
1.1 Package Pinout: 28-Pin SOIC Package
1.2 Pin Description: 28-Pin SOIC Package
VS - 1
VB - 2
3
HO - 4
5
6
7
8
9
VDD - 10
HIN - 11
SD - 12
LIN - 13
VSS - 14
28
27
26
25
24 - VSM
23 - VBM
22 - VSM
21
20
19 - VCC
18
17 - COM
16
15 - LO
Pin# Name
Description
1 VS High-Side Floating Supply Return
2 VB High-Side Floating Supply
3 - No Connection
4 HO High-Side Gate Drive Output
5 - No Connection
6 - No Connection
7 - Internal Connection, Do Not Use
8 - No Connection
9 - Internal Connection, Do Not Use
10 VDD Logic Supply
11 HIN Logic Input for High-Side Gate Drive
Output (HO), In-Phase
12 SD Logic Input for Shutdown
13 LIN Logic Input for Low-Side Gate Driver
Output (LO), In-Phase
14 VSS Logic Ground
15 LO Low-Side Gate Drive Output
16 - No Connection
17 COM Low-Side Return
18 - No Connection
19 VCC Low-Side Supply
20 - Internal Connection, Do Not Use
21 - No Connection
22 VSM Middle Floating Return
23 VBM Middle Floating Supply
24 VSM Middle Floating Return
25 - No Connection
26 - No Connection
27 - No Connection
28 - No Connection
R02 www.ixysic.com
3
3Pages INTEGRATED CIRCUITS DIVISION
1.8 Test Waveforms
1.8.1 Switching Time Test Circuit
VCC=15V
10µF 0.1µF
10 19 2
VDD VCC VB
VS 1
HIN
SD
LIN
11 4
12 23
VBM
VSM 22
VSM 24
15
13
VSS COM
14 17
0.1µF 10µF
CL 10µF
VB
+
13.5V
-
VS
(0 to 1000V/1200V)
HO
0.1µF 10µF
10µF
VBM
+
13.5V
-
VSM
(0 to 500V/600V)
LO
CL
IX2120
1.8.2 Input/Output Timing Waveform
HIN
LIN
SD
HO
LO
1.8.3 Switching Time Waveform Definition
HIN
LIN
ton
HO
LO
50%
50%
tr
90%
toff tf
90%
10%
10%
1.8.4 Shutdown Waveform Definitions
50%
SD
tsd
HO 90%
LO
1.8.5 Delay Matching Waveform Definitions
HIN 50%
LIN
50%
LO HO
10%
MT MT
90%
LO HO
6
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R02
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ページ | 合計 : 13 ページ | ||
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PDF ダウンロード | [ IX2120 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
IX2120 | 1200V High and Low Side Gate Driver | IXYS |
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