PDF IS42VM81600E Data sheet ( Hoja de datos )

Número de pieza	IS42VM81600E
Descripción	128Mb Mobile Synchronous DRAM
Fabricantes	ISSI
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No Preview Available ! IS42VM81600E / IS42VM16800E / IS42VM32400E IS45VM81600E / IS45VM16800E / IS45VM32400E 16Mx8, 8Mx16, 4Mx32 128Mb Mobile Synchronous DRAM FEATURES • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access and pre- charge • Programmable CAS latency: 2, 3 • Programmable Burst Length: 1, 2, 4, 8, and Full Page • Programmable Burst Sequence: • Sequential and Interleave • Auto Refresh (CBR) • TCSR (Temperature Compensated Self Refresh) • PASR (Partial Arrays Self Refresh): 1/16, 1/8, 1/4, 1/2, and Full • Deep Power Down Mode (DPD) • Driver Strength Control (DS): 1/4, 1/2, and Full OPTIONS • Configurations: 16M x 8, 8M x 16, 4M x 32 • Power Supply IS42VMxxx – Vdd/Vddq = 1.8 V • Packages: x8 / x16 –TSOP II (54), BGA (54) [x16 only] x32 – TSOP II (86), BGA (90) • Temperature Range: Commercial (0°C to +70°C) Industrial (–40 ºC to 85 ºC) Automotive, A1 (–40 ºC to 85 ºC) Automotive, A2 (–40 ºC to 105 ºC) JUNE 2011 DESCRIPTION ISSI's 128Mb Mobile Synchronous DRAM achieves high- speed data transfer using pipeline architecture. All input and output signals refer to the rising edge of the clock input. Both write and read accesses to the SDRAM are burst oriented. The 128Mb Mobile Synchronous DRAM is designed to minimize current consumption making it ideal for low-power applications. Both TSOP and BGA packages are offered, including industrial grade products. KEY TIMING PARAMETERS Parameter CLK Cycle Time CAS Latency = 3 CAS Latency = 2 CLK Frequency CAS Latency = 3 CAS Latency = 2 Access Time from CLK CAS Latency = 3 CAS Latency = 2 -75 7.5 9.6 133 104 5.4 8.0 -10 Unit 10 ns 12 ns 100 Mhz 83 Mhz 8.0 ns 9.0 ns ADDRESSING TABLE Parameter Configuration Refresh Count Row Addressing Column Addressing Bank Addressing Precharge Addressing 16M x 8 4M x 8 x 4 banks 4K/64ms A0-A11 A0-A9 BA0, BA1 A10 8M x 16 2M x 16 x 4 banks 4K/64ms A0-A11 A0-A8 BA0, BA1 A10 4M x 32 1M x 32 x 4 banks 4K/64ms A0-A11 A0-A7 BA0, BA1 A10 Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with- out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such ap- plications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. - www.issi.com Rev. A 04/08/2011 1 1 page IS42VM81600E / IS42VM16800E / IS42VM32400E IS45VM81600E / IS45VM16800E / IS45VM32400E PIN CONFIGURATION 54-ball fBGA for x16 (Top View) (8.00 mm x 8.00 mm Body, 0.8 mm Ball Pitch) package code: B 123456789 A B VSS DQ15 VSSQ C DQ14 DQ13 VDDQ D DQ12 DQ11 VSSQ E DQ10 DQ9 VDDQ F DQ8 NC VSS G DQMH CLK CKE H NC A11 A9 J A8 A7 A6 VSS A5 A4 VDDQ DQ0 VDD VSSQ DQ2 DQ1 VDDQ DQ4 DQ3 VSSQ DQ6 DQ5 VDD DQML DQ7 CAS RAS WE BA0 BA1 CS A0 A1 A10 A3 A2 VDD PIN DESCRIPTIONS: 8Mx16 A0-A11 Row Address Input A0-A8 Column Address Input BA0, BA1 Bank Select Address DQ0 to DQ15 Data I/O CLK System Clock Input CKE Clock Enable CS Chip Select RAS Row Address Strobe Command CAS Column Address Strobe Command WE DQML DQMH Vdd Vss Vddq Vssq NC Write Enable x16 Lower Byte Input/Output Mask x16 Upper Byte Input/Output Mask Power Ground Power Supply for I/O Pin Ground for I/O Pin No Connection Integrated Silicon Solution, Inc. - www.issi.com Rev. A 04/08/2011 5 5 Page IS42VM81600E / IS42VM16800E / IS42VM32400E IS45VM81600E / IS45VM16800E / IS45VM32400E Test modes and reserved states should not be used because unknown operation or incompatibility with future versions may result. Write Burst Mode When M9 = 0, the burst length programmed via M0-M2 applies to both READ and WRITE bursts; when M9 = 1, the programmed burst length applies to READ bursts, but write accesses are single-location (nonburst) accesses. CAS Latency T0 T1 T2 T3 CLK COMMAND DQ READ NOP tAC tLZ CAS Latency - 2 NOP DOUT tOH CLK T0 COMMAND READ DQ T1 T2 T3 T4 NOP NOP tAC tLZ CAS Latency - 3 NOP DOUT tOH DON'T CARE UNDEFINED Integrated Silicon Solution, Inc. - www.issi.com Rev. A 04/08/2011 11 11 Page

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