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PDF IS42RM32160C Data sheet ( Hoja de datos )
| Número de pieza | IS42RM32160C | |
| Descripción | 512Mb Mobile Synchronous DRAM | |
| Fabricantes | ISSI | |
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IS42SM32160C
IS42RM32160C
16Mx32
512Mb Mobile Synchronous DRAM
NOVEMBER 2010
FEATURES:
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access and pre-
charge
• Programmable CAS latency: 2, 3
• Programmable Burst Length: 1, 2, 4, 8, and Full
Page
• Programmable Burst Sequence:
• Sequential and Interleave
• Auto Refresh (CBR)
• TCSR (Temperature Compensated Self Refresh)
• PASR (Partial Arrays Self Refresh): 1/16, 1/8,
1/4, 1/2, and Full
• Deep Power Down Mode (DPD)
• Driver Strength Control (DS): 1/4, 1/2, and Full
OPTIONS:
• Configuration: 16Mx32
• Power Supply:
IS42SMxxx - Vdd/Vddq = 3.3V
IS42RMxxx - Vdd/Vddq = 2.5V
• Package: 90 Ball BGA (8x13mm)
• Temperature Range:
Commercial (0oC to +70oC)
Industrial (-40oC to +85oC)
• Die revision: C
DESCRIPTION:
ISSI's IS42SM/RM32160C is a 512Mb Mobile Syn-
chronous DRAM configured as a quad 4M x32 DRAM.
It achieves high-speed data transfer using a pipeline
architecture with a synchronous interface. All inputs and
outputs signals are registered on the rising edge of the
clock input, CLK. The 512Mb SDRAM is internally con-
figured by stacking two 256Mb, 16Mx16 devices. Each
of the 4M x32 banks is organized as 8192 rows by 512
columns by 32 bits.
KEY TIMING PARAMETERS
Parameter
-7 -75
CLK Cycle Time
CAS Latency = 3
7 7.5
CAS Latency = 2
9.6 9.6
CLK Frequency
CAS Latency = 3
143 133
CAS Latency = 2
104 104
Access Time from CLK
CAS Latency = 3
5.4 5.4
CAS Latency = 2
77
Unit
ns
ns
Mhz
Mhz
ns
ns
ADDRESS TABLE
Parameter
Configuration
Bank Address Pins
Autoprecharge Pins
Row Addresses
Column Addresses
Refresh Count
16Mx32
4M x 32 x 4 banks
BA0, BA1
A10/AP
A0 – A12
A0 – A8
8K / 64ms
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc.
Rev. A
11/09/2010
1
1 page  
IS42SM32160C
IS42RM32160C
Mobile SDRAM Functionality
ISSI’s 512Mb Mobile SDRAMs are pin compatible and have similar functionality with ISSI’s standard SDRAMs, but
offer lower operating voltages and power saving features. For detailed descriptions of pin functions, command truth
tables, functional truth tables, device operation as well as timing diagrams please refer to ISSI document “Mobile
Synchronous DRAM Device Operations & Timing Diagrams” listed at www.issi.com
REGISTER DEFINITION
Mode Register (MR) & Extended Mode Register (EMR)
There are two mode registers in the Mobile SDRAM; Mode Register (MR) and Extended Mode Register (EMR). The
Mode Register is discussed below, followed by the Extended Mode Register. The Mode Register is used to define
the specific mode of operation of the SDRAM. This definition includes the selection of burst length, a burst type, CAS
Latency, operating mode, and a write burst mode. The mode register is programmed via the LOAD MODE REGISTER
command and will retain the stored information until it is programmed again or the device loses power.
The EMR controls the functions beyond those controlled by the MR. These additional functions are special features
of the Mobile SDRAM. They include temperature-compensated self refresh (TCSR) control, partial-array self refresh
(PASR), and output drive strength. The EMR is programmed via the MODE REGISTER SET command with BA1
= 1 and BA0 = 0 and retains the stored information until it is programmed again or the device loses power. Not
programming the extended mode register upon initialization will result in default settings for the low-power features.
The extended mode will default with the temperature sensor enabled, full drive strength, and full array (all 4 banks)
refresh.
Mode Register Definition
The MR is used to define the specific mode of operation of the SDRAM. This definition includes the selection of a
burst length, a burst type, a CAS latency, an operating mode and a write burst mode, as shown in Figure MODE
REGISTER DEFINITION. The mode register is programmed via the LOAD MODE REGISTER command and will
retain the stored information until it is programmed again or the device loses power.
Mode register bits M0 - M2 specify the burst length, M3 specifies the type of burst (sequential or interleaved), M4 -
M6 specify the CAS latency, M7 and M8 specify the operating mode, M9 specifies the WRITE burst mode, and M10,
M11, and M12 are reserved for future use.
The mode register must be loaded when all banks are idle, and the controller must wait the specified time before
initiating the subsequent operation. Violating either of these requirements will result in unspecified operation.
Integrated Silicon Solution, Inc.
Rev. A
11/09/2010
5
5 Page 
IS42SM32160C
IS42RM32160C
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameters
Rating
Unit
Vdd
Vddq
Vin
Vout
Ics
Pd
Topt
Supply Voltage (with respect to Vss)
Supply Voltage for Output (with respect to Vssq)
Input Voltage (with respect to Vss)
Output Voltage (with respect to Vssq)
Short circuit output current
Power Dissipation (Ta = 25oC)
Operating Temperature
Com.
Ind.
-0.5 to +4.6
-0.5 to +4.6
-0.5 to Vdd+0.5
-1.0 to Vdd+0.5
50
1
0 to +70
-40 to +85
V
V
V
V
mA
W
°C
°C
Tstg
Storage Temperature
–65 to +150 °C
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All voltages are reference to Vss.
CAPACITANCE
Symbol Parameter
Cin
Input Capacitance, address and control pin
Cclk
Input Capacitance, CLK pin
Cio
Data Input/Output Capacitance
Min.
5.0
5.0
4
Max.
7.0
7.6
6.5
Unit
pF
pF
pF
Integrated Silicon Solution, Inc.
Rev. A
11/09/2010
11
11 Page | ||
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| PDF Descargar | [ Datasheet IS42RM32160C.PDF ] | |
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