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PDF IS45S16320D Data sheet ( Hoja de datos )
| Número de pieza | IS45S16320D | |
| Descripción | 512Mb SDRAM | |
| Fabricantes | ISSI | |
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IS42/45R86400D/16320D/32160D
IS42/45S86400D/16320D/32160D
16Mx32, 32Mx16,
512Mb SDRAM
64Mx8 SEPTEMBER 2012
DEVICE OVERVIEW
FEATURES
• Clock frequency: 200, 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Power supply: Vdd/Vddq = 2.3V-3.6V
IS42/45SxxxxxD - Vdd/Vddq = 3.3V
IS42/45RxxxxxD - Vdd/Vddq = 2.5
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Auto Refresh (CBR)
• Self Refresh
• 8K refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
• Packages:
x8/x16: 54-pin TSOP-II, 54-ball TF-BGA (x16 only)
x32: 90-ball TF-BGA
• Temperature Range:
Commercial (0oC to +70oC)
Industrial (-40oC to +85oC)
Automotive, A1 (-40oC to +85oC)
Automotive, A2 (-40oC to +105oC)
ISSI's 512Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock input.
The 512Mb SDRAM is organized as follows.
PACKAGE INFORMATION
IS42/45S32160D IS42/45S16320D IS42/45S86400D
IS42/45R32160D IS42/45R16320D IS42/45R86400D
4M x 32 x 4
banks
8M x 16 x 4
banks
16M x 8 x 4
banks
90-ball TF-BGA 54-pin TSOP-II 54-pin TSOP-II
54-ball TF-BGA
KEY TIMING PARAMETERS
Parameter
Clk Cycle Time
CAS Latency = 3
CAS Latency = 2
Clk Frequency
CAS Latency = 3
CAS Latency = 2
Access Time from Clock
CAS Latency = 3
CAS Latency = 2
-5
5
10
200
100
5.0
6
-6 -7 Unit
6 7 ns
10 7.5 ns
167 143 Mhz
100 133 Mhz
5.4 5.4 ns
6 5.4 ns
ADDRESS TABLE
Parameter 16M x 32
Configuration 4M x 32 x 4
banks
Bank Address BA0, BA1
Pins
Autoprecharge A10/AP
Pins
Row Address 8K(A0 – A12)
32M x 16
8M x 16 x 4
banks
BA0, BA1
A10/AP
8K(A0 – A12)
64M x 8
16M x 8 x 4
banks
BA0, BA1
A10/AP
8K(A0 – A12)
Column
Address
512(A0 – A8) 1K(A0 – A9) 2K(A0 – A9,
A11)
Refresh Count
Com./Ind./A1 8K / 64ms
A2 8K / 16ms
8K / 64ms
8K / 16ms
8K / 64ms
8K / 16ms
Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with-
out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain
the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such ap-
plications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com 1
Rev. A
08/29/2012
1 page  
IS42/45R86400D/16320D/32160D, IS42/45S86400D/16320D/32160D
PIN CONFIGURATION
54-ball TF-BGA for x16 (Top View) (8.00 mm x 13.00 mm Body, 0.8 mm Ball Pitch)
package code: B
123456789
A
B VSS DQ15 VSSQ
C DQ14 DQ13 VDDQ
D DQ12 DQ11 VSSQ
E DQ10 DQ9 VDDQ
F DQ8 NC VSS
G DQMH CLK CKE
H A12 A11 A9
J A8 A7 A6
VSS A5 A4
VDDQ DQ0 VDD
VSSQ DQ2 DQ1
VDDQ DQ4 DQ3
VSSQ DQ6 DQ5
VDD DQML DQ7
CAS RAS WE
BA0 BA1 CS
A0 A1 A10
A3 A2 VDD
PIN DESCRIPTIONS
A0-A12
Row Address Input
A0-A9
Column Address Input
BA0, BA1
Bank Select Address
DQ0 to DQ15 Data I/O
CLK
System Clock Input
CKE
Clock Enable
CS Chip Select
RAS
Row Address Strobe Command
CAS
Column Address Strobe Command
WE Write Enable
DQML
x16 Lower Byte Input/Output Mask
DQMH
x16 Upper Byte Input/Output Mask
Vdd Power
Vss Ground
Vddq
Power Supply for I/O Pin
Vssq
Ground for I/O Pin
NC No Connection
Integrated Silicon Solution, Inc. — www.issi.com 5
Rev. A
08/29/2012
5 Page 
IS42/45R86400D/16320D/32160D, IS42/45S86400D/16320D/32160D
FUNCTIONAL TRUTH TABLE
Current State
CS RAS CAS WE
Address
Command Action
Idle
H X X X
X
DESL
Nop or Power Down(2)
L H H H
X
NOP
Nop or Power Down(2)
L H H L
X
BST
Nop or Power Down
L H L H
BA, CA, A10
READ/READA ILLEGAL (3)
L H L L
A, CA, A10
WRIT/ WRITA ILLEGAL(3)
L L H H
BA, RA
ACT
Row activating
L L H L
BA, A10
PRE/PALL
Nop
L L L H
X
REF/SELF
Auto refresh or Self-refresh(4)
L L L L
OC, BA1=L
MRS
Mode register set
Row Active
H X X X
X
DESL
Nop
L H H H
X
NOP
Nop
L H H L
X
BST
Nop
L H L H
BA, CA, A10
READ/READA Begin read (5)
L H L
L
BA, CA, A10
WRIT/ WRITA Begin write (5)
L L
H H
BA, RA
ACT
ILLEGAL (3)
L L H L
BA, A10
PRE/PALL
Precharge
Precharge all banks(6)
L L
L H
X
REF/SELF
ILLEGAL
L L
L L
OC, BA
MRS
ILLEGAL
Read
H X X X
X
DESL
Continue burst to end to
Row active
L H H H
X
NOP
Continue burst to end Row
Row active
L H H L
X
BST
Burst stop, Row active
L H L
H
BA, CA, A10
READ/READA Terminate burst,
begin new read (7)
L H L
L
BA, CA, A10
WRIT/WRITA Terminate burst,
begin write (7,8)
L L H H
BA, RA
ACT
ILLEGAL (3)
L L H L
BA, A10
PRE/PALL
Terminate burst
Precharging
L L L H
X
REF/SELF
ILLEGAL
L L L L
OC, BA
MRS
ILLEGAL
Write
H X X X
X
DESL
Continue burst to end
Write recovering
L H H H
X
NOP
Continue burst to end
Write recovering
L H H L
X
BST
Burst stop, Row active
L H L
H
BA, CA, A10
READ/READA Terminate burst, start read :
Determine AP (7,8)
L H L
L
BA, CA, A10
WRIT/WRITA Terminate burst, new write :
Determine AP (7)
L L H H
BA, RA
RA ACT
ILLEGAL (3)
L L H L
BA, A10
PRE/PALL
Terminate burst Precharging (9)
L L L H
X
REF/SELF
ILLEGAL
L L L
L
OC, BA
MRS
ILLEGAL
Note: H=Vih, L=Vil x= Vih or Vil, V = Valid Data, BA= Bank Address, CA+Column Address, RA=Row Address, OC= Op-Code
Integrated Silicon Solution, Inc. — www.issi.com 11
Rev. A
08/29/2012
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet IS45S16320D.PDF ] | |
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