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IS45R16320D の電気的特性と機能

IS45R16320DのメーカーはISSIです、この部品の機能は「512Mb SDRAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS45R16320D
部品説明 512Mb SDRAM
メーカ ISSI
ロゴ ISSI ロゴ 




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IS45R16320D Datasheet, IS45R16320D PDF,ピン配置, 機能
IS42/45R86400D/16320D/32160D
IS42/45S86400D/16320D/32160D
16Mx32, 32Mx16,
512Mb SDRAM
64Mx8 SEPTEMBER 2012
DEVICE OVERVIEW
FEATURES
• Clock frequency: 200, 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Power supply: Vdd/Vddq = 2.3V-3.6V
IS42/45SxxxxxD - Vdd/Vddq = 3.3V
IS42/45RxxxxxD - Vdd/Vddq = 2.5
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Auto Refresh (CBR)
• Self Refresh
• 8K refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
• Packages:
x8/x16: 54-pin TSOP-II, 54-ball TF-BGA (x16 only)
x32: 90-ball TF-BGA
• Temperature Range:
Commercial (0oC to +70oC)
Industrial (-40oC to +85oC)
Automotive, A1 (-40oC to +85oC)
Automotive, A2 (-40oC to +105oC)
ISSI's 512Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock input.
The 512Mb SDRAM is organized as follows.
PACKAGE INFORMATION
IS42/45S32160D IS42/45S16320D IS42/45S86400D
IS42/45R32160D IS42/45R16320D IS42/45R86400D
4M x 32 x 4
banks
8M x 16 x 4
banks
16M x 8 x 4
banks
90-ball TF-BGA 54-pin TSOP-II 54-pin TSOP-II
54-ball TF-BGA
KEY TIMING PARAMETERS
Parameter
Clk Cycle Time
CAS Latency = 3
CAS Latency = 2
Clk Frequency
CAS Latency = 3
CAS Latency = 2
Access Time from Clock
CAS Latency = 3
CAS Latency = 2
-5
5
10
200
100
5.0
6
-6 -7 Unit
6 7 ns
10 7.5 ns
167 143 Mhz
100 133 Mhz
5.4 5.4 ns
6 5.4 ns
ADDRESS TABLE
Parameter 16M x 32
Configuration 4M x 32 x 4
banks
Bank Address BA0, BA1
Pins
Autoprecharge A10/AP
Pins
Row Address 8K(A0 – A12)
32M x 16
8M x 16 x 4
banks
BA0, BA1
A10/AP
8K(A0 – A12)
64M x 8
16M x 8 x 4
banks
BA0, BA1
A10/AP
8K(A0 – A12)
Column
Address
512(A0 – A8) 1K(A0 – A9) 2K(A0 – A9,
A11)
Refresh Count
Com./Ind./A1 8K / 64ms
A2 8K / 16ms
8K / 64ms
8K / 16ms
8K / 64ms
8K / 16ms
Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with-
out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain
the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such ap-
plications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com 1
Rev. A
08/29/2012

1 Page





IS45R16320D pdf, ピン配列
IS42/45R86400D/16320D/32160D, IS42/45S86400D/16320D/32160D
PIN CONFIGURATIONS
54 pin TSOP - Type II for x8
VDD
DQ0
VDDQ
NC
DQ1
VSSQ
NC
DQ2
VDDQ
NC
DQ3
VSSQ
NC
VDD
NC
WE
CAS
RAS
CS
BA0
BA1
A10
A0
A1
A2
A3
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54 VSS
53 DQ7
52 VSSQ
51 NC
50 DQ6
49 VDDQ
48 NC
47 DQ5
46 VSSQ
45 NC
44 DQ4
43 VDDQ
42 NC
41 VSS
40 NC
39 DQM
38 CLK
37 CKE
36 A12
35 A11
34 A9
33 A8
32 A7
31 A6
30 A5
29 A4
28 VSS
PIN DESCRIPTIONS
A0-A12
A0-A9, A11
BA0, BA1
DQ0 to DQ7
CLK
CKE
CS
RAS
CAS
Row Address Input
Column Address Input
Bank Select Address
Data I/O
System Clock Input
Clock Enable
Chip Select
Row Address Strobe Command
Column Address Strobe Command
WE Write Enable
DQM Data Input/Output Mask
Vdd Power
Vss Ground
Vddq Power Supply for I/O Pin
Vssq Ground for I/O Pin
NC No Connection
Integrated Silicon Solution, Inc. — www.issi.com 3
Rev. A
08/29/2012


3Pages


IS45R16320D 電子部品, 半導体
IS42/45R86400D/16320D/32160D, IS42/45S86400D/16320D/32160D
PIN CONFIGURATION
PACKAGE CODE: B 90 BALL TF-BGA (Top View) (8.00 mm x 13.00 mm Body, 0.8 mm Ball Pitch)
123456789
A
DQ26 DQ24 VSS
B
DQ28 VDDQ VSSQ
C
VSSQ DQ27 DQ25
D
VSSQ DQ29 DQ30
E
VDDQ DQ31 NC
F
VSS DQM3 A3
G
A4 A5 A6
H
A7 A8 A12
J
CLK CKE A9
K
DQM1 NC NC
L
VDDQ DQ8 VSS
M
VSSQ DQ10 DQ9
N
VSSQ DQ12 DQ14
P
DQ11 VDDQ VSSQ
R
DQ13 DQ15 VSS
VDD DQ23 DQ21
VDDQ VSSQ DQ19
DQ22 DQ20 VDDQ
DQ17 DQ18 VDDQ
NC DQ16 VSSQ
A2 DQM2 VDD
A10 A0 A1
NC BA1 A11
BA0 CS RAS
CAS WE DQM0
VDD DQ7 VSSQ
DQ6 DQ5 VDDQ
DQ1 DQ3 VDDQ
VDDQ VSSQ DQ4
VDD DQ0 DQ2
PIN DESCRIPTIONS
A0-A12
Row Address Input
A0-A8
Column Address Input
BA0, BA1
Bank Select Address
DQ0 to DQ31 Data I/O
CLK
System Clock Input
CKE
Clock Enable
CS
Chip Select
RAS
Row Address Strobe Command
CAS Column Address Strobe Command
WE
DQM0-DQM3
Vdd
Vss
Vddq
Vssq
NC
Write Enable
x32 Input/Output Mask
Power
Ground
Power Supply for I/O Pin
Ground for I/O Pin
No Connection
6 Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
08/29/2012

6 Page



ページ 合計 : 30 ページ
 
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部品番号部品説明メーカ
IS45R16320D

512Mb SDRAM

ISSI
ISSI
IS45R16320F

512Mb SDRAM

ISSI
ISSI


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