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IS39LV010 の電気的特性と機能

IS39LV010のメーカーはISSIです、この部品の機能は「3.0 Volt-only CMOS Flash Memory」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS39LV010
部品説明 3.0 Volt-only CMOS Flash Memory
メーカ ISSI
ロゴ ISSI ロゴ 




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IS39LV010 Datasheet, IS39LV010 PDF,ピン配置, 機能
IS39LV512 / IS39LV010 / IS39LV040
512 Kbit / 1Mbit / 4Mbit 3.0 Volt-only CMOS Flash Memory
FEATURES
Single Power Supply Operation
- Low voltage range: 2.70 V - 3.60 V
• Memory Organization
- IS39LV512: 64K x 8 (512 Kbit)
- IS39LV010: 128K x 8 (1 Mbit)
- IS39LV040: 512K x 8 (4 Mbit)
• High Performance Read
- 70 ns access time
• Cost Effective Sector/Block Architecture
- Uniform 4 Kbyte sectors
- Uniform 64 Kbyte blocks (sector group - except
IS39LV512)
• Data# Polling and Toggle Bit Features
• Hardware Data Protection
• Automatic Erase and Byte Program
- Build-in automatic program verification
- Typical 16 µs/byte programming time
- Typical 55 ms sector/block/chip erase time
• Low Power Consumption
- Typical 4 mA active read current
- Typical 8 mA program/erase current
- Typical 0.1 µA CMOS standby current
• High Product Endurance
- Guarantee 100,000 program/erase cycles per
single sector (preliminary)
- Minimum 20 years data retention
• Industrial Standard Pin-out and Packaging
- 32-pin (8 mm x 14 mm) VSOP
- 32-pin PLCC
- Optional lead-free (Pb-free) package
• Operation temperature range
- IS39LV512/010
-40oC~+85oC
- IS39LV040
0oC~+85oC
GENERAL DESCRIPTION
The IS39LV512/010/040 are 512 Kbit/1 Mbit/4 Mbit 3.0 Volt-only Flash Memories. These devices are designed
to use a single low voltage, range from 2.70 Volt to 3.60 Volt, power supply to perform read, erase and program
operations. The 12.0 Volt VPP power supply for program and erase operations are not required. The devices can
be programmed in standard EPROM programmers as well.
The memory array of I S39LV512 is divided into uniform 4 Kbyte sectors for data or code storage. The memory
arrays of IS39LV010/040 are divided into uniform 4 Kbyte sectors or uniform 64 Kbyte blocks (sector group -
consists of sixteen adjacent sectors). The sector or block erase feature allows users to flexibly erase a memory
area as small as 4 Kbyte or as large as 64 Kbyte by one single erase operation without affecting the data in
others. The chip erase feature allows the whole memory array to be erased in one single erase operation. The
devices can be progr ammed on a byte-by-byte basis after performing the erase operation.
The devices have a s tandard microprocessor interface as well as a JEDEC standard pin-out/command set. The
program operation is executed by issuing the program command code into command register. The internal control
liossguicinagutthoemcahtiicpaellyrahs aen, dblleosckth, eorpsreocgtroarmemrainseg
voltage ramp-up and timing. The erase
command code into command register.
operation is
The internal
executed by
control logic
automatically handle s the erase voltage ramp-up and timing. The preprogramming on the array which has not
been programmed is not required before an erase operation. The devices offer Data# Polling and Toggle Bit
functions,
Polling on
tIh/Oe7pororgthree sTsoogrgcleomBipt loentioIn/Oo6f.
program
and
erase
operations
can
be
detected
by
reading
the
Data#
The IS39LV512/010/0 40 are manufactured on pFLASH™’s advanced nonvolatile CMOS technology. The devices
are offered in 32-pin VSOP and PLCC packages with 70 ns access time.
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  A
04/24/2013
1

1 Page





IS39LV010 pdf, ピン配列
PIN DESCRIPTIONS
IS39LV512 / IS39LV010 / IS39LV040
SYMBOL
TYPE
A0 - AMS(1)
INPUT
CE# INPUT
WE#
OE#
INPUT
INPUT
I/O0 - I/O7
INPUT/
OUTPUT
VCC
GND
NC
DESCRIPTION
Address Inputs: For memory addresses input. Addresses are internally
latched on the falling edge of WE# during a write cycle.
Chip Enable: CE# goes low activates the device’s internal circuitries for
device operation. CE# goes high deselects the device and switches into
standby mode to reduce the power consumption.
Write Enable: Activate the device for write operation. WE# is active low.
Output Enable: Control the device’s output buffers during a read cycle.
OE# is active low.
Data Inputs/Outputs: Input command/data during a write cycle or output
data during a read cycle. The I/O pins float to tri-state when OE# are
disabled.
Device Power Supply
Ground
No Connection
Note:
1. AMS is the most significant address where AMS = A15 for IS39LV512, A16 for IS39LV010, and A18 for
IS39LV040.
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  A
04/24/2013
3


3Pages


IS39LV010 電子部品, 半導体
IS39LV512 / IS39LV010 / IS39LV040
SECTOR/BLOCK ADDRESS TABLE
Memory Density
Block
(1)
Block
Size
(Kbytes)
Sector
Sector
Size
(Kbytes)
Address Range
Sec-
tor 0
4 00000h - 00FFFh
512Kbit
1 Mbit
Block
0 (2)
Sec-
tor 1
64
:
Sector
15
Sector
16
4 01000h - 01FFFh
::
4 0F000h - 0FFFFh
4 10000h - 10FFFh
Sector
Block 1
64
17
4 Mbit
:
Sector
31
4 11000h - 11FFFh
::
4 1F000h - 1FFFFh
Block 2
64
20000h - 2FFFFh
Block 3
64
30000h - 3FFFFh
Block 4
64
40000h - 4FFFFh
Block 5
64
50000h - 5FFFFh
Block 6
64
60000h - 6FFFFh
Block 7
64
70000h - 7FFFFh
Notes:
1. A Block is a 64 Kbyte sector group which consists of sixteen adjecent sectors of 4 Kbyte each.
2. Block erase feature is available for IS39LV010/040 only. The chip erase command should be used to erase
the Block 0 for the IS39LV512.
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  A
04/24/2013
6

6 Page



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部品番号部品説明メーカ
IS39LV010

3.0 Volt-only CMOS Flash Memory

ISSI
ISSI


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