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IS25WP080 の電気的特性と機能

IS25WP080のメーカーはISSIです、この部品の機能は「1.8V SERIAL FLASH MEMORY」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS25WP080
部品説明 1.8V SERIAL FLASH MEMORY
メーカ ISSI
ロゴ ISSI ロゴ 




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IS25WP080 Datasheet, IS25WP080 PDF,ピン配置, 機能
ADVANCED INFORMATION
IS25WP016
IS25WP080
IS25WP040
IS25WP020
16/8/4/2MBIT
1.8V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI &
QUAD I/O QPI DTR INTERFACE
ADVANCED DATA SHEET

1 Page





IS25WP080 pdf, ピン配列
ADVANCED INFORMATION
IS25WP016/080/040/020
GENERAL DESCRIPTION
The IS25WP016/080/040/020 Serial Flash memory offers a versatile storage solution with high flexibility and
performance in a simplified pin count package. ISSI’s “Industry Standard Serial Interface” Flash is for systems
that require limited space, a low pin count, and low power consumption. The device is accessed through a 4-
wire SPI Interface consisting of a Serial Data Input (SI), Serial Data Output (SO), Serial Clock (SCK), and Chip
Enable (CE#) pins, which can also be configured to serve as multi-I/O (see pin descriptions).
The device supports Dual and Quad I/O as well as standard, Dual Output, and Quad Output SPI. Clock
frequencies of up to 133MHz allow for equivalent clock rates of up to 532MHz (133MHz x 4) allowing more than
66Mbytes/s of data throughput. The IS25xP series of Flash adds support for DTR (Double Transfer Rate)
commands that transfer addresses and read data on both edges of the clock. These transfer rates can
outperform 16-bit Parallel Flash memories allowing for efficient memory access to support XIP (execute in
place) operation.
The memory array is organized into programmable pages of 256-bytes. This family supports page program
mode where 1 to 256 bytes of data are programmed in a single command. QPI (Quad Peripheral Interface)
supports 2-cycle instruction further reducing instruction times. Pages can be erased in groups of 4Kbyte
sectors, 32Kbyte blocks, 64Kbyte blocks, and/or the entire chip. The uniform sector and block architecture
allows for a high degree of flexibility so that the device can be utilized for a broad variety of applications
requiring solid data retention.
GLOSSARY
Standard SPI
In this operation, a 4-wire SPI Interface is utilized, consisting of Serial Data Input (SI), Serial Data Output (SO),
Serial Clock (SCK), and Chip Enable (CE#) pins. Instructions are sent via the SI pin to encode instructions,
addresses, or input data to the device on the rising edge of SCK. The DO pin is used to read data or to check
the status of the device on the falling edge of SCK. This device supports SPI bus operation modes (0,0) and
(1,1).
Mutil I/O SPI
Multi-I/O operation utilizes an enhanced SPI protocol to allow the device to function with Dual Output, Dual Input
and Output, Quad Output, and Quad Input and Output capability. Executing these instructions through SPI
mode will achieve double or quadruple the transfer bandwidth for READ and PROGRAM operations.
Quad I/O QPI
The device enables QPI protocol by issuing an “Enter QPI mode (35h)” command. The QPI mode uses four IO
pins for input and output to decrease SPI instruction overhead and increase output bandwidth. SI and SO pins
become bidirectional IO0 and IO1, and WP# and HOLD# pins become IO2 and IO3 respectively during QPI
mode. Issuing an “Exit QPI (F5h) command will cause the device to exit QPI mode. Power Reset or
Hardware/Software Reset can also return the device into the standard SPI mode.
DTR
In addition to SPI and QPI features, the device also supports SPI DTR READ. SPI DTR allows high data
throughput while running at lower clock frequencies. SPI DTR READ mode uses both rising and falling edges of
the clock to drive output, resulting in reducing input and output cycles by half.
Programmable drive strength and Selectable burst setting.
The device offers programmable output drive strength and selectable burst (wrap) length features to increase
the efficiency and performance of READ operation. The driver strength and burst setting features are controlled
by setting the Read Registers. A total of six different drive strengths and four different burst sizes (8/16/32/64
Bytes) are available for selection.
Integrated Silicon Solution, Inc.- www.issi.com
Rev. 00A
01/13/2015
3


3Pages


IS25WP080 電子部品, 半導体
ADVANCED INFORMATION
IS25WP016/080/040/020
10.3 8-Pin 150mil TSSOP Package (JD)..................................................................................................101
10.4 8-Pin 150mil VVSOP Package (JV)..................................................................................................102
10.5 8-Contact Ultra-Thin Small Outline No-Lead (WSON) Package 6x5mm (JK)..................................104
10.6 8-Contact Ultra-Thin Small Outline No-Lead (USON) Package 4x3mm (JT)...................................105
10.7 8-Contact Ultra-Thin Small Outline No-Lead (USON) Package 2x3mm (JU) ..................................106
10.8 8-Pin 208mil VSOP Package (JF) ....................................................................................................107
10.9 16-lead Plastic Small Outline package (300 mils body width) (JM)..................................................108
10.10 24-Ball Thin Profile Fine Pitch BGA 6x8mm (JG)...........................................................................109
11. ORDERING INFORMATION- Valid Part Numbers..............................................................................110
Integrated Silicon Solution, Inc.- www.issi.com
Rev. 00A
01/13/2015
6

6 Page



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部品番号部品説明メーカ
IS25WP080

1.8V SERIAL FLASH MEMORY

ISSI
ISSI


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